Closed Flians closed 1 year ago
Describe the bug When I run the aqfp_flow_date, I found that the cec result of the circuit m3 was false.
m3
To Reproduce Steps to reproduce the behavior: ./experiments/aqfp_flow_date
./experiments/aqfp_flow_date
Environment
Additional context I have checked the code. I found that after write_blif, the primary output y1 was changed from ~x0 to a constant.
write_blif
y1
~x0
Close and replaced by #600. If just for running aqfp_flow_date, you could replace write_blif by write_verilog.
aqfp_flow_date
write_verilog
Describe the bug When I run the aqfp_flow_date, I found that the cec result of the circuit
m3
was false.To Reproduce Steps to reproduce the behavior:
./experiments/aqfp_flow_date
Environment
Additional context I have checked the code. I found that after
write_blif
, the primary outputy1
was changed from~x0
to a constant.