mockturtle is a C++-17 logic network library. It provides several logic network implementations (such as And-inverter graphs, Majority-inverter graphs, and k-LUT networks), and generic algorithms for logic synthesis and logic optimization.
The following code snippet reads an AIG from an Aiger file, enumerates all cuts and prints them for each node.
#include <mockturtle/mockturtle.hpp>
#include <lorina/aiger.hpp>
mockturtle::aig_network aig;
auto const result = lorina::read_aiger( "file.aig", mockturtle::aiger_reader( aig ) );
assert( result == lorina::return_code::success );
auto const cuts = cut_enumeration( aig );
aig.foreach_node( [&]( auto node ) {
std::cout << cuts.cuts( aig.node_to_index( node ) ) << "\n";
} );
A modern compiler is required to build mockturtle. We are continuously testing with Clang 12.0.1, GCC 9.3.0, and GCC 10.2.0. More information can be found in the documentation.
mockturtle is part of the EPFL logic synthesis libraries. The other libraries and several examples on how to use and integrate the libraries can be found in the logic synthesis tool showcase.