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m-labs / misoc

The original high performance and small footprint system-on-chip based on Migen™
https://m-labs.hk
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Paths broken when using Cygwin and Xilinx tools in Windows #59

Closed FelixVi closed 6 years ago

FelixVi commented 6 years ago

Paths generated in top.prj and top.xst are incorrect when ISE is used under Windows.

I think most Windows users would want to use ISE already installed under Windows rather than having a second installation under Cygwin.

A good option in my opinion would be to allow the user to provide a "windows-style" path to the cygwin directory. Generated gateware can then easily compiled from the ISE command prompt under Windows.

Examples of generated paths:

verilog work /usr/lib/python3.6/site-packages/misoc-0.6.dev0-py3.6.egg/misoc/cores/lm32/verilog/submodule/rtl/lm32_dcache.v

Example of desired path:

verilog work D:\cygwin64\lib\python3.6\site-packages\misoc-0.6.dev0-py3.6.egg\misoc\cores\lm32\verilog\submodule\rtl\lm32_dcache.v
FelixVi commented 6 years ago

This is being resolved by migen PR #88.