RISC-V RV32I C Emulator
This is a simple RISC-V emulator. It runs non compressed 32-bit RISC-V instructions.
The runmem excutable will allow you ro step though some RISV-V and dump state on each step
make runmem
You can run tests with:-
make test
./test
There are still some tests to be completed!
You can emebed the emulator into other executables by including RV32I.h
and linking RV32I,alu,alu2,branch and sb. Then set up some memory and initailize with:-
init_memory(memory);
set_pc(0x0); // Assume PC is at 0x0
set_sp(512); // Optional set stack pointer
You can then step through code with
step();
dump_regsiters(); // Optionally dump registers
It possible to run simple code built with gcc and view register states, however system calls will not work.
Firstly you will need to build the gcc toolchain to enable rv23i architecture:-
./configure --prefix=/opt/riscv --with-arch=rv32i --with-abi=ilp32
Then for an example we can create a simple main method:-
int main() {
int a=10,b=20;
return a*b;
}
Once this is done you can build an opbject file with the following:-
/opt/riscv/bin/riscv32-unknown-elf-gcc -c test.c
You can ten extract the binary file with:-
/opt/riscv/bin/riscv32-unknown-elf-objcopy --dump-section .text=out test.o
Now you can step through the binary. Firstly build the memory runner:-
make runmem
Now run the code and see the register dump:-
runmem out
fence, ecall and ebreak currently just call sbreak which outputs some text. This will be changed to a call back in a later revision.