msinger / dmg-schematics

Reverse engineered schematics of the Game Boy's DMG-CPU B chip
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MODE2 wire is mislabeled as MODE1 #161

Closed tclemens closed 1 year ago

tclemens commented 1 year ago

It's source is OAM_PARSING && !DMA_RUN. It's also a component of STAT[1] which should only be set in modes 2 and 3.

msinger commented 1 year ago

Thank you, I think you are right. Seems like we have overlooked this. If it raises bit 1 of the MODE[1:0] field in the STAT register, then it must be high during MODE2, not MODE1. I will check simulation results once more just to make sure, and then fix it.

rgalland commented 1 year ago

@msinger , I can make the changes if you like.

msinger commented 1 year ago

Hi @rgalland, thanks, I'm already done. Just about to push. :)

rgalland commented 1 year ago

@msinger , man! you were fast.

msinger commented 1 year ago

Let's hope I didn't miss something.

rgalland commented 1 year ago

No, you haven't it seems fine. We could almost change INT_VBL to MODE1, INT_HBL to MODE2 and INT_VBL_BUF to INT_VBL.

msinger commented 1 year ago

Changing INT_VBL_BUF to INT_VBL would clean up FF0F INT (page 10). This was bothering me for a while that this is the only interrupt that hat a _BUF in its name.

msinger commented 1 year ago

Oh, careful. :) You mean, INT_HBL to MODE0.

rgalland commented 1 year ago

Yes, that's what I meant.