nand2mario / snestang

Super Nintendo Entertainment System for Tang FPGA boards
GNU General Public License v3.0
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Mclk refactor #6

Closed nand2mario closed 3 months ago

nand2mario commented 3 months ago

Refactoring the code base to more closely follow the upstream MIST/MiSTer SNES core.

  1. Change main clock from 10.6Mhz (wclk) to 21.477Mhz (mclk).
  2. New req-ack-based SDRAM controller for mega138k and primer25k. The m138k one supports 2 channels and works at 3x mclk. The p25k one supports 3 channels (including VRAM) and works at 4x mclk.
  3. Fix freezes or rendering errors: the lost vikings, breath of fire.
  4. Architecture-wise, the SNES core is now mostly the same with upstream, with our own iosys softcore, hdmi and SDRAM components. It should be more modular, and easier to sync with upstream going forward.
  5. Add config.v for conditional build of DSPn, GSU and other components, to make debugging easier.

Known issues: