nczempin NICNAC16-FPGA issues

nczempin / NICNAC16-FPGA

Learning CPU design with an old-school 16-bit FPGA implementation

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issues

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fix set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets led_OBUF[12]]

#72 nczempin opened 5 years ago
0
use shift registers for minimizing pins to control panel

#71 nczempin opened 5 years ago
0
port to CMOD A7

#70 nczempin opened 5 years ago
0
use rotary encoder for the rotary switch

#69 nczempin opened 5 years ago
0
Digital current loop interface

#68 nczempin opened 5 years ago
0
test PMOD input

#67 nczempin closed 5 years ago
0
(Basys 3) test PMOD inout

#66 nczempin opened 5 years ago
0
use serial console for debugging

#65 nczempin opened 5 years ago
0
I guess bring back the example debouncer, despite it being in VHDL

#64 nczempin opened 5 years ago
0
memory detection routine

#63 nczempin opened 5 years ago
0
(Basys 3) check if JXADC is the correct pin for the dual-purpose port

#62 nczempin closed 5 years ago
2
use CONCY1 and CONCY2 rather than my improv

#61 nczempin opened 5 years ago
0
(Basys 3) Hook up board features such as VGA, Serial, keyboard

#60 nczempin opened 5 years ago
0
Fix multi-driven net(s) on d_ffs

#59 nczempin closed 5 years ago
0
Basys 3: PMOD hello world

#58 nczempin closed 5 years ago
0
use external (slow) clock

#57 nczempin opened 5 years ago
1
(Basys 3)investigate if "abuse" of vga and other pins is possible

#56 nczempin opened 5 years ago
0
(Basys 3) map 32 pmod lines to memory and i/o

#55 nczempin opened 5 years ago
2
use Basys BTN as pushbutton and as control knob

#54 nczempin opened 5 years ago
2
move inout bus(es) to outermost layer

#53 nczempin closed 5 years ago
1
run code in RAM

#52 nczempin closed 5 years ago
0
CONCY1 and CONCY2 not really working correctly

#51 nczempin closed 5 years ago
0
get some kind of equivalent to a cassette tape working

#50 nczempin opened 5 years ago
0
turn tri-state bus to muxes

#49 nczempin closed 5 years ago
3
RUN mode is supposed to start after pushing button

#48 nczempin opened 5 years ago
0
separate design out into multiple boards off one expansion bus

#47 nczempin opened 5 years ago
0
simulate core memory

#46 nczempin opened 5 years ago
0
make a version without ROM

#45 nczempin opened 5 years ago
0
find out about PDP-8 major state timing

#44 nczempin opened 5 years ago
0
introduce "return from interrupt" operation

#43 nczempin opened 5 years ago
0
use individual lines for control knob

#42 nczempin opened 5 years ago
0
correct address bus(ses) width to 12

#41 nczempin opened 5 years ago
0
"programmer's manual"

#40 nczempin opened 5 years ago
0
front panel logic & sim

#39 nczempin closed 5 years ago
0
extend instruction set a little bit

#38 nczempin opened 5 years ago
0
stabilization issue out of reset

#37 nczempin closed 5 years ago
0
interrupt when writing to ROM

#36 nczempin opened 5 years ago
1
glitches

#35 nczempin closed 5 years ago
1
major mode should start as fetch

#34 nczempin closed 5 years ago
0
memory outside the cpu; rom and ram

#33 nczempin closed 5 years ago
0
RUN signal

#32 nczempin closed 5 years ago
0
Find good simple programs from the dawn of computing

#31 nczempin opened 5 years ago
4
move instruction decoding to control unit

#30 nczempin closed 5 years ago
1
use real RAM on de10-nano board

#29 nczempin opened 5 years ago
1
really learn properly how to use clocks on FPGAs (with PLLs and stuff)

#28 nczempin opened 5 years ago
0
one unified clock divider (reuse instead of duplicate)

#27 nczempin opened 5 years ago
2
address splitter

#26 nczempin closed 5 years ago
0
internal RAM

#25 nczempin closed 5 years ago
0
I_DIO

#24 nczempin closed 5 years ago
0
I_RET

#23 nczempin opened 5 years ago
1