Open atakahashiarcher opened 3 months ago
Right now, I'm post-processing the TopLevel.vi to apply the steps described in https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/controlling-io-power-on-states-fpga-module.html. This seems like something that should be applied during the Workflow Advisor steps. Is this a feature that I'm just missing or is it something that might be planned for implementation in the future?
I really don't want to have to go through bitfile compilation twice if I can avoid it. It's also a bit annoying to run Workflow advisor up to the point of .lvproj generation and then have to quit Workflow Advisor to do custom editing.
Right now, I'm post-processing the TopLevel.vi to apply the steps described in https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/controlling-io-power-on-states-fpga-module.html. This seems like something that should be applied during the Workflow Advisor steps. Is this a feature that I'm just missing or is it something that might be planned for implementation in the future?
I really don't want to have to go through bitfile compilation twice if I can avoid it. It's also a bit annoying to run Workflow advisor up to the point of .lvproj generation and then have to quit Workflow Advisor to do custom editing.