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openhwgroup
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cv-hpdcache
RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
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mshr: Prevent assertion misfire during reset
#44
paulsc96
opened
3 days ago
1
fix data width warnings (Verilator Lint)
#43
cfuguet
closed
1 week ago
0
Fix cast int' into unsigned' when required
#42
Gchauvon
closed
1 week ago
2
mem_req_write_arb: fix ready / valid dependency
#41
cfuguet
closed
1 week ago
0
ci: parallelize run jobs
#40
cfuguet
closed
1 week ago
0
[PLRU with dirty bit] How does eviction work in the case of write back
#39
khandelwaltanuj
closed
3 days ago
2
fix: handling of errors for write miss requests
#38
cfuguet
closed
1 week ago
0
[reset on the fly] In the case of CONFIG3_EMBEDDED, a spurious assertion for unsolicited response
#37
khandelwaltanuj
opened
1 week ago
1
Add nonregression validation on push and pull-requests in the CI workflows
#36
cfuguet
closed
1 week ago
0
[Document Write Back] What are the events that writes data in the memory ?
#35
khandelwaltanuj
opened
2 weeks ago
3
[Document] The section explaining PLRU seems incomplete
#34
khandelwaltanuj
opened
2 weeks ago
1
fix: prefetch requests should update PLRU on cache hit
#33
cfuguet
closed
3 weeks ago
0
[Question] PLRU in the case of error responses
#32
khandelwaltanuj
closed
3 weeks ago
2
[Question] How are the error responses treated
#31
khandelwaltanuj
opened
3 weeks ago
13
tb: add dependencies URL links in the README
#30
cfuguet
closed
3 weeks ago
0
Draft: modification for HPICache
#29
takeshiho0531
closed
1 month ago
1
Update the documentation section of the README
#28
cfuguet
closed
2 months ago
0
Update the changelog file
#27
cfuguet
closed
2 months ago
0
New HPDcache User Guide in reStructuredText format
#26
cfuguet
closed
2 months ago
0
Fix some warnings
#25
cfuguet
closed
2 months ago
0
fix: syntax of the Verible action script
#24
cfuguet
closed
4 months ago
0
Relocate the lint folder
#23
cfuguet
closed
4 months ago
0
Relocate the lint folder
#22
cfuguet
closed
4 months ago
0
rtl: Make AXI transactions modifiable by default
#21
alex96295
closed
4 months ago
4
Add bender manifest file
#20
michael-platzer
closed
5 months ago
1
Bender file and question w.r.t. hybrid write-back/write-through policy
#19
michael-platzer
closed
5 months ago
3
[PLRU Issue] In case of CMO_PREFETCH plru behaves differently in case if HIT or MISS
#18
khandelwaltanuj
closed
1 week ago
5
[AMO Signed] Issue with signed AMO in 32 bit core interface
#17
khandelwaltanuj
closed
6 months ago
1
feat: high performance icache
#16
takeshiho0531
closed
5 months ago
0
Type of `HPDCACHE_VICTIM_SEL`
#15
dgptha
closed
6 months ago
3
Feat hpdc icache
#14
takeshiho0531
closed
7 months ago
0
Remove Useless "pragma translaste_on"
#13
Gchauvon
closed
8 months ago
1
[AMO 32bits] There are issues with the AMOs in the 32 bit configuration
#12
khandelwaltanuj
closed
8 months ago
1
Fixed Icache Inval Addres request on L1.5 adapter
#11
AileonN
closed
8 months ago
1
Shared interface for invals and refills
#10
AileonN
closed
8 months ago
0
[PLRU] The plru in the case of AMOs is not being updated properly.
#9
khandelwaltanuj
closed
8 months ago
3
[PARAMS] Issue with CONF_HPDCACHE_WORD_WIDTH parameter
#8
khandelwaltanuj
closed
8 months ago
1
[PARAMS] Correctly handle HPDCACHE_DATA_RAM_Y_CUTS = 1
#7
cfuguet
closed
8 months ago
1
[PARAMS] Problem with parameter HPDCACHE_WBUF_SEND_FEEDTHROUGH = 1
#6
khandelwaltanuj
closed
1 month ago
4
OpenPiton + HPDC support
#5
AileonN
closed
9 months ago
2
GSoC project: Enhancing OpenPiton+Ariane With a High-Performance Data Cache
#4
AileonN
closed
9 months ago
0
Refills failed when HPDCACHE_ACCESS_WORDS is 1 or equal to HPDCACHE_CL_WORDS
#3
AileonN
closed
1 year ago
2
Assertion failed at the start of the simulation
#2
ArnauBigas
closed
1 year ago
2
Align names for parameters in the RTL and the specification document
#1
cfuguet
closed
1 year ago
0