r0.2.1 DFM changes - Githubissues

gregdavill commented 4 years ago

With the production run of r0.2 boards complete. I've got some ideas for adjusting the designs to improve the test workflow, and optimise the BOM (With the goal of reducing the total unit cost)

These are ideas slated for r0.2.1, There shall be no electrical/pin changes to the FPGA/DDR3. With my versioning convention any gateware/examples for r0.2 should work on r0.2.1.

To improve the testing procedures:

[x] Add larger test-points for USB connection, enabling the tests/programming to occur without plugging USB in.
[x] Add test-points for JTAG, so we avoid plugging in the JTAG connection every time.

BOM optimisations:

[x] Evaluate swapping DCDC regulators from WLCSP to DFN/SOT (Lower cost, lower assembly cost)
[x] Remove JTAG connector in favor of through-hole 0.05"/0.1" footprint (The Samtec 0.05" JTAG connector is quite expensive)
[x] Alter RGB LEDs used. (Ensure R,G,B mapping is kept identical)
[x] Remove VTT resistors, as they're not required for the scope of this design.
[x] Remove DDR VREF LDO, for 1-2 SDRAM chips a simple resistor divider is acceptable.

Other nice changes:

[x] USB-C? (Likely making use of a USB 2.0 type-C connector, see #18 )
[x] Panelisation changes to avoid any rough tabs left on board edges
[x] Castellated edges?

Feel free to add any extra comments or suggestions to this issue.

gregdavill commented 4 years ago

These boards pass the same self-test that we ran on r0.2 boards! They look great too!

Note: production boards will be in the standard Orange Colour.

Will need to update docs with information about various version numbers to avoid confusion.

gregdavill commented 4 years ago

Design files are up: https://github.com/gregdavill/OrangeCrab/tree/main/hardware/orangecrab_r0.2.1

orangecrab-fpga / orangecrab-hardware

r0.2.1 DFM changes #25