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pnnl / OpenCGRA

OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
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CGRA Power Consumption Report #1

Closed Hassan313 closed 3 years ago

Hassan313 commented 3 years ago

Hi,

How I can use your tool to obtain power consumption for FIR filter application?

Thank you.

tancheng commented 3 years ago

Thanks for your interest in OpenCGRA. To get the power consumption for a specific application kernel, we need first to compile it to generate control signals. Then generate a CGRA, upload those control signals into the control memory to drive the simulation (and generate the SAIF file). Afterwards, using mflowgen to drive the CAD tools (Cadence) to get the accurate power stats. You probably wanna dig into mflowgen to see how to easily get power/area/timing for any customized accelerator. Or, you could get some rough average power consumption of the generated CGRA Verilog by simulating it via VCS/Cadence without the SAIF file.

Hassan313 commented 3 years ago

Thank you for your response. I will try to use the code in a way that you said.

tancheng commented 3 years ago

There is 2x2 synthesizable CGRA in the folder, you can manipulate the width and height (and eliminate the test code) to make the design larger. After getting the Verilog, you could use CAD tools to get the rough power consumption before and after place&route. Thanks~