riscvarchive riscv-eabi-spec issues - Githubissues

riscvarchive / riscv-eabi-spec

Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.

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mandate stack alignment throughout entire program life

#13 jnk0le opened 2 years ago
3
subset calling conventions for inline handlers pressure (wishfull thinking bias warning)

#12 jnk0le opened 2 years ago
4
EABI x Zce issues to be straightened

#11 jnk0le opened 2 years ago
0
Missing LICENSE file

#10 jjscheel closed 3 years ago
1
Redefine floating-point registers and argument passing

#9 ghost opened 4 years ago
0
4 arguments register may be a perf. issue for 64 bits type

#8 soberl closed 5 years ago
2
Floating point ABI need not be adjusted for interrupt latency

#7 marceg opened 5 years ago
11
Treating unused tp or gp as saved registers

#6 marceg opened 5 years ago
2
System preprocessor definitions for architecture & ABI

#5 ilg-ul opened 5 years ago
1
Some past EABI notes

#4 ilg-ul closed 5 years ago
3
C++ virtual function dispatch efficiency?

#3 ilg-ul closed 5 years ago
6
Choice of number of temp/arg/saved registers.

#2 kasanovic opened 5 years ago
2
Support hard-float ABI for f register args/temporaries

#1 kasanovic opened 5 years ago
0