rmadith 554 issues - Githubissues

rmadith / 554

Spring 2024 Capstone Project

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Debug DBP with Working C Code

#34 rsdingle opened 3 months ago
0
Debug C assembly test

#33 thedubbers9 opened 3 months ago
1
More Dynamic Branch Tests

#32 rsdingle opened 3 months ago
0
Final Report

#31 rsdingle opened 3 months ago
0
Open House Poster

#30 rsdingle opened 3 months ago
0
C Code: moving tank turret

#29 rsdingle opened 3 months ago
0
C Code: level design/loading

#28 rsdingle opened 3 months ago
1
C Code: win/defeat

#27 rsdingle opened 3 months ago
0
C Code: moving enemy tank

#26 rsdingle opened 3 months ago
0
C Code: moving bullet

#25 rsdingle opened 3 months ago
0
Resize the BMP and PNG to have power of 2 as size

#24 rsdingle opened 3 months ago
0
Make sure LOAD/STORE instructions pass Harish's testbench

#23 thedubbers9 opened 3 months ago
0
Sprites to BMP And the Other Positions

#22 rsdingle opened 3 months ago
1
Dynamic Branch Prediction integration into RISC-V

#21 rsdingle opened 3 months ago
0
Move a tank "body" using joystick

#20 thedubbers9 opened 3 months ago
0
Integrate dynamic branch prediction into pipelined CPU

#19 thedubbers9 opened 3 months ago
0
HLL simulator of CPU multicycle

#18 thedubbers9 opened 3 months ago
0
Verify pipelining of processor with full forwarding

#17 thedubbers9 opened 3 months ago
0
C software

#16 thedubbers9 opened 3 months ago
0
Make sure single-cycle processor passes HLL simulator randomized tests

#15 thedubbers9 opened 4 months ago
3
Create/find Sprites

#14 thedubbers9 opened 4 months ago
0
Joystick interface with processor (ADC and memory mapping)

#13 thedubbers9 opened 4 months ago
0
Self-checking assembly/Validation suite for single-cycle CPU

#12 thedubbers9 opened 4 months ago
0
Interface Document Due Thursday

#11 thedubbers9 opened 4 months ago
0
Revise schematic

#10 thedubbers9 opened 4 months ago
0
Update Forwarding & Hazard Detection Units to RISC-V

#9 thedubbers9 opened 4 months ago
0
Create pipeline registers

#8 thedubbers9 opened 5 months ago
0
EX and MEM pipeline stage modules

#7 thedubbers9 opened 5 months ago
1
F, D &WB pipeline stage modules

#6 thedubbers9 opened 5 months ago
1
HLL simulator of CPU single cycle

#5 thedubbers9 opened 5 months ago
1
Bootloader

#4 thedubbers9 opened 5 months ago
1
Interrupts

#3 thedubbers9 opened 5 months ago
0
RISC-V Arch schematic

#2 thedubbers9 opened 5 months ago
1
Dynamic Branch Prediction in 552 CPU

#1 thedubbers9 opened 5 months ago
1