rsd-devel / rsd

RSD: RISC-V Out-of-Order Superscalar Processor
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Attempts to access a non-existent CSR don't raise illegal instruction exceptions #38

Open mmxsrup opened 3 years ago

mmxsrup commented 3 years ago

Observed Behavior

An illegal instruction exception should be raised when accessing a non-existent CSR, as described in Chapter 3.6.1 of RISC-V Privileged Architectures.

Attempts to access a non-existent CSR raise an illegal instruction exception.

For example, csrr t0, 0x394 is a instruction to access a CSR with address 0x394 that does not exist.

Therefore, this instruction should raise an illegal instruction exception, but in the current RSD, this instruction is executed normally without raising an illegal instruction exception. This issue applies to other CSRs as well.

Steps to reproduce the issue

When executing an instruction that accesses a non-existent CSR, as shown in the following code, you can confirm that the illegal instruction executes normally without raising an illegal instruction exception.

int main(void){
    asm volatile ("csrr t0, 0x394");
}