The low bit of mepc is not updated correctly

[mmxsrup]

Observed Behavior

The low bit of mepc is always zero, as described in Chapter 3.1.19 of RISC-V Privileged Architectures.

mepc is an XLEN-bit read/write register formatted as shown in Figure 3.20. The low bit of mepc (mepc[0]) is always zero. On implementations that do not support instruction-set extensions with 16-bit instruction alignment, the two low bits (mepc[1:0]) are always zero.

For example, csrw mepc, 0x1 is a instruction to set the low bit of mepc. In the current RSD implementation, when such an instruction is executed, the low bit of mepc is set. If the low bit of mepc is updated correctly, the low bit of mepc will always be zero.

Steps to reproduce the issue

The code below writes the value 1 to mepc and then reads the value of mepc. When you execute the following code, you can confirm that the value of mepc is 1. Correctly, the value of mepc should be zero.

int main(void){
    asm volatile ("csrw mepc, 0x1;\
                   csrr t0, mepc");
}