Fix a bug that causes incorrect recovery if all instructions are flushed when ActiveList is full

rsd-devel / rsd

RSD: RISC-V Out-of-Order Superscalar Processor

Apache License 2.0

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Closed reo-pon closed 1 year ago

reo-pon commented 1 year ago

Fix recovery logic:

flushAllInsns signal was added to distinguish whether ActiveList is empty or full. This signal is used to decide whether to flush the instruction.

Now recovery works correctly even when ActiveList is full.

(This bug was found using hardware fuzzing technique by mmxsrup)