Fix wakeup pipeline register - Githubissues

rsd-devel / rsd

RSD: RISC-V Out-of-Order Superscalar Processor

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Fix wakeup pipeline register #57

Closed momorrowz closed 1 year ago

momorrowz commented 1 year ago

fix a bug of WakeupPipelineRegister

correctly update wakeupVector and canBeFlushedRegCount when stall.
selectively flush by using flushAllInsns instead of recovery.flushAllInsns