sharpie7 / circuitjs1

Electronic Circuit Simulator in the Browser
GNU General Public License v2.0
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Faulty circuit behaviour and convergence fail #853

Open GaryTavish opened 1 year ago

GaryTavish commented 1 year ago

Hi, I recently found this project and was amazed by the user-friendly interface and accurate simulation results. However, it does not give the correct result when I simulate the pulsed coil drive circuit. circuit-20230331-0734

The idea of this circuit is that the RST signal resets two SR flip-flops, and the TRIG fires the first SR flip-flop to turn on the MOSFET. When the voltage across the current sense resistor reach 300mV(30A on coil), the op-amp (comparator in a real circuit) activates the second SR flip-flop to turn off the MOSFET.

In the simulation, if the op-amp output directly connect to the Cut-off input, it trigged the Cut-off at the moment TRIG turned high, but the op-amp didn't output any voltage. It acts like the DC operating point has been recalculated, thus the MOSFET is never turned on.

I tried using a comparator and failed. I tried to implement logic circuits using discrete components and failed. I added an RC circuit to delay the Cut-off signal, it works, but the current on the coil already reach 100A. I set the time step to 5ns and it can give the correct result. It would be nice if this could be fixed and please let me know if I use the software incorrectly. Many thanks.

Signal Timing: RST H, TRIG L -> RST L, TRIG L -> RST L, TRIG H -> RST L, TRIG L -> Repeat If the simulation starts when RST stay low, a convergence failure will occur.

$ 1 0.000001 1.4391916095149893 33 5 50 5e-11 l 528 608 592 608 0 0.000022 0.1551358153743781 0 r 592 608 656 608 0 0.1 f 480 624 528 624 52 1.5 44 g 528 704 528 720 0 0 v 656 656 656 608 0 0 40 20 0 0 0.5 g 656 656 656 672 0 0 151 352 608 384 608 0 2 0 5 151 352 672 384 672 0 2 0 5 151 352 736 384 736 0 2 0 5 151 352 800 384 800 0 2 0 5 151 288 592 320 592 0 2 5 5 151 288 816 320 816 0 2 5 5 w 320 816 352 816 0 w 352 624 352 640 0 w 352 640 384 640 0 w 384 640 384 672 0 w 352 656 336 656 0 w 336 656 336 608 0 w 336 608 384 608 0 w 384 736 336 736 0 w 336 736 336 784 0 w 336 784 352 784 0 w 384 800 384 768 0 w 384 768 352 768 0 w 352 768 352 752 0 w 352 688 352 720 0 w 352 688 288 688 0 w 288 688 288 608 0 w 320 592 352 592 0 L 288 576 256 576 0 0 false 5 0 r 528 704 528 656 0 0.01 w 528 640 528 656 0 151 400 624 432 624 0 2 0 5 w 384 608 400 608 0 w 400 640 400 736 0 w 384 736 400 736 0 I 432 624 480 624 0 0.5 5 v 496 928 496 896 0 0 40 0.3 0 0 0.5 g 496 928 496 944 0 0 a 464 880 384 880 9 5 0 1000000 0.3 -1.9704724388985877 1000 w 288 800 288 688 0 w 464 896 496 896 0 d 528 560 656 560 2 1N4004 w 528 560 528 608 0 w 656 560 656 608 0 c 288 896 288 944 0 0.000001 0.001 0.001 g 288 944 288 960 0 0 r 288 896 352 896 0 200 w 496 864 496 656 0 w 496 656 528 656 0 x 172 581 226 584 4 24 TRIG I 240 688 288 688 0 0.5 5 L 240 688 208 688 0 0 false 5 0 x 137 694 180 697 4 24 RST S 384 880 352 880 0 1 false 0 2 w 352 864 288 864 0 w 288 832 288 864 0 w 288 864 288 896 0 w 496 864 464 864 0 x 193 857 275 860 4 24 Cut-off o 1 2 0 4353 20 0.00009765625 0 2 1 3