Open michaelcompressconsult opened 3 months ago
remark: of course my example just illustrates the state. It draws way too much current. L should behave like L in 2-way logic does, - (or better O?) should be high impedace to both sides.
maybe it is already implemented, but currenty enabling 3-way logic switches to numeric. But that might be what i expect in non-numeric 3-way logic.
Some chips have an logic output implemented as open collector or can be configured that way I would prefer to have this as logic input available, instead of modellig the final transosteot too.
so states could eb L and - (- meaning open collector, high impedance) H and - H, L and -
example: https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgpABZsKBTAWjDACgAZcGmkFFXqxR8BUMQDMAhgBsAzg2qQ2Adz4ZhaPCGzZCffFDYAXEb35n1psRCY1opBw5rEKsR08IIwBFMxdg4EAATBikAV2kjNgBzNQ0aKkxhbDQxJQAnbjNRcysqALg2ACVtXXAULWw8QQq02iokKiboBBVSvTBanT1NQzRybv1Kwi0BKl4AezCjAAdpgB1ZCfFFgGMACwBLGbYAIxA8fK6wAYR6JQAPA-IwQkTsG8J6M14AFS3ZRdl1qaDF3YYbCueH8xEST3AxGefF4HEWAHpFkxFtIJtFNqsZItNgA7OZRIA