Zotino v1.1

[hartytp]

• [x] Remove simulations page from schematic (let's just leave the Spice files in the repository)
• [x] Update power budget
• [x] Use two output resistors in series/parallel to improve power handling (200mW short-circuit)
• [x] reverse C143, C145, C147, C84
• [x] mirrored SOT23 diode footprint due to Altium bug - part of component is on top layer, pads are on bottom layer.
• [x] add Shottky diodes at the LDO outputs
• [x] 3mm higher EMC shield on PSU
• [ ] hole for heatsink in EMC shield
• [x] reverse IDC connector on BNC to IDC board
• [ ] Zero-index all channels
• [x] swap BNC connector GND terminals
• [x] either add ~2mm plastic washers on BNC barrel behind front panel or move BNC connectors 2mm towards FP. This is to enable fixing the BNC connectors to the panel using the screws.
• [x] Please remove the annotation "This module connects to Kasli ..." and replace it with something like "EEM connector: IO are LVDS, I2C is 3V3 LVCMOS, P3V3_MP up to 20mA, P12V up to 1A." (use same annotation as other EEMs)
• [x] run PI and thermal simulations. Please can you also double check that all regulators can handle the required current etc. Please also double check the layout for any places that could cause issues (bad cross-talk or patristics that could lead to oscillation, etc)
• ~Can we run the digital interface from 2V5?~ No -- see sampler discussions about this!
• [x] Fix temperature controller issues:
• [x] Silk + schematic + panel should be "v1.x" not "rev1.x" Silk should just say "Zotino v1.1" (copy from Sampler) still needs doing: Add Zotino name to schematic and pcb, add version number to schematic and front panel
• [x] Only have one set of +-12V regulators, not two!
• [x] Reduce SMPs outputs slightly, since we're only using +-12 regulators
• [x] Remove BNC to IDC connectors from this; they should be a separate project (they are a useful adapter for other boards like Sampler, and not part of the DAC design).
• [x] Upload BNC to IDC connector boards as a separate project.
• [x] Update front panel (see discussion in other issues)
• [x] Let's remove the simulations page from the schematic, better to just include the simulation itself in the project directory
• [x] Tidy up adapter boards cf comments here (two posts). Add annotations on silk and schematic for the adapter boards indicating how the connectors map to the channel (e.g. top=0, bottom=1 for the BNCs etc).
• [x] Remaining temperature controller issues here
• [x] Add more test points for power supply rails (both at the SMPS and for the LDOs), SPI, etc
• [x] For the TEC IDC, let's add a ground wire between the TEC and the thermistor to reduce EMI from the noisy TEC current (which is rectified by the temperature sensor, leading to errors).

[hartytp]

@gkasprow uuurgh, nasty!

Okay, the current situation is fine. However, it's a little confusing that the schematics don't match the silkscreen of front panel. Maybe add a one line annotation at the top of the schematic near the connectors saying something like "Note: DAC channels are zero-indexed on silk screen and front panel"?

Can you also upload the files to a release, please?

Also, did you fix the screening enclosure to fit the TEC + heatsink?

[hartytp]

Thanks again for the great work on this Greg!

[gkasprow]

once PCB house accepts them, I will upload.

[hartytp]

@gkasprow One thing I think we got wrong in this version is the ground return for the 12V TEC current. This should really have gone back to the EEM connector with a dedicated thick ground trace rather than returning through the main ground (it might also have been worth adding a capacitor by the TEC IDC).

Normally I don't like separating grounds like this, but DC power traces are the one place where I it does work well, and the TECs can draw enough current to cause measurable changes in the DAC's output voltage.

In practice, this may not end up being a problem, since it looks like we will not use the +12V or I2C from this header, as Thermostat will have ethernet + PoE....

[gkasprow]

@hartytp indeed there should be return path that does not pass via our DAC circuit. But the current consumption at 12V won't be high - max 300mA and the return current path is quite far away from the ADC. There are already cut-outs in the ground plane just to limit the return path of the SMPS so I don't afraid of them. I can make simulation to check how this return current propagates.

[hartytp]

@gkasprow Let's not worry about it for now. It's easy to fix in the next revision.

[a-shafir]

I added BOM related issue in the errata thread.

[gkasprow]

Don't worry about 0.1% resistors. We have plenty of them on stock and their price impact is negligible.

[a-shafir]

@gkasprow as far as I understand from the previous discussion there are a lot of efforts to do right things, not to make it too complicate or "without a reason". For usd0.23 * 64 can be added even another DAC on the board...

Any way IMHO there shall be a way for mass production. If for the production optimization will need a lot of BOM changes it will be a risk of unexpected issues, so better to keep it tight.

I see 3 options:

1. Put it in errata or to do list " replace xx to 1%"
2. Put this part on the BOM and sch as generic 1% but in the assembly BOM you can choose 0.1% as "stock".
3. Keep that reels of 0.1% in stock and use it in the next designs where matched resistors are the must (instrumental amplifiers, bridges etc). The values are vell suitable for this.

Option 3 is the most rational IMHO and just ignoring it is the least rational. Just my opinion.

[gkasprow]

We already have rails of mostly 0.5 and 0.1% resistors. It does not make sense to keep stock of 5, 1, 0.5 and 0.1% in 0402, 0603, 0805 sizes because it would cost fortune. It's cheaper to keep stock of only 0.1% resistors. And we buy 100,000 pcs, not 100 pcs.

[gkasprow]

Once somebody wants to produce these boards, he can change a few lines of BOM with suitabe values.

[a-shafir]

@gkasprow what is the price for 0.1% at your source? I also would like to have such source that I will be able to use 0.1% freely. For most of my previous designs targeted mass production's keeping the specs AND the target cost was the must.

Regarding the BOM. As I wrote. Normally in the boms there is a column with the basic specs like R0402_1k_1% it can be more detailed when it is not so generic like R0402_1k_1%_150mW or it can be a specific part number - that minds ONLY this part meets the board needs (like Tyco RN73C1J2K32BTDF). This is the "design BOM.

There is also a production BOM that have a specific vendor parts or even a factory stock locator.

Since we have already hundreds of positions in the BOMs (looking all the boards active) it will be more and more difficult to order non generic " irreplaceable " parts. So better to start some CIS system.

Otherwise for the further production the design engineer must review and approve EVERY replacement of the non-generic part! So better to have non-generic only where it need indeed like the key components.

Of course this system can be changed later. With way more efforts.

This is besides the 3rd party production matters you mention.

IMHO

[hartytp]

the must

"a must"?

[hartytp]

@a-shafir While I appreciate your enthusiasm about this, @gkasprow is the lead engineer here and this kind of decision is up to him. You're free to raise issues like this, but once you've been overruled please drop it.

I don't want to see this being a long argument about ways of shaving 1% off the cost of manufacturing these boards -- and even if we did want to do that I suspect that there are lower hanging fruit than worrying about resistor tolerances.

[gkasprow]

@a-shafir For all my designs i use same, unified library just to make sure that all the components the assembly house has on stock. They know I use same library and know that they can invest and buy whole reels of these components. I have and use 1% resistors for certain popular values. But rarely used like E192 values I have in my lib only 0.1% just to make life easier and keep the total cost low. Otherwise I'd have to keep several tolerances of every E192 resistor. Take into account that every new BOM line is costly to maintain in the assembly house, it also means that would need to be ordered in low quantities which is simply not worth the effort. We produce thousands of other boards for many different clients and this is the best way we managed to figure out during last ten years.

[a-shafir]

@hartytp OK, no worries. In this case I am concerning only of streamlining the workflow. Also since the project is "public" keeping it more "friendly" to produce and just clean will help the sayma ecosystem.

There is nothing personal. I don't want to make one "wrong" or myself "right" etc.

About the labeling 500r sounds for me more important since a typically non-rf DAC voltage output is buffered and some current limit labeled. I clearly understand why adding 32 buffers is a bad idea here but adding the label line shall help.

[a-shafir]

@gkasprow OK, than it is just labeling issue on the scematics. Indeed there is no easy way to solve this readability of sch and linkage to the BOM. Showing all attributes of the parts makes sch non-readable. Showing only value is leading for very scrupulous BOM check. It looks for me the most clean way that allows printable schematics but still very clear is to list some "defaults" on one of the page like "resistor: 0402, 5%, generic; capacitor: 0402 COG 5% 50V..." Than show all non-default attributes like "10k", " 10k_0603", "10uf_0603_x7r" or even "RN73C1J2K32BTDF". How it sounds? Note:I just think that establishing this or any better system for the new designs will help.

[gkasprow]

You can use Altium viewer to access full details. Long time ago I used to enable footprint and PN but schematic became a mess. That's why you have a BOM and CTRL+F command to investigate. And free Altium Viewer.

[gkasprow]

@a-shafir do you want sth like this ?

[a-shafir]

I wish it to be illustrative and visible Something like this https://github.com/m-labs/spectropak/blob/master/hvamp_proto3/spectroamp3.pdf I can't say there is one pattern that works for all In some cases even a netlist can be more readable.

[gkasprow]

I have such parameters that can be enabled

[a-shafir]

I also tried various layouts. There is drawback of any. Adding more data to sch at least needs bigger paper to print (keeping it readable). The visible value is easiest to use since there is no toyaly strict rules for it. And it is one line. Showing all attributes for every parts in one string does not work - your example is great. My idea is:

1. have some "defaults" (per schematic) Can be printed or " common sense". Like <1000pf is COG <1uf X7R etc.

2. add to the value field manually all non-common attributes.

3. Use part number when the part can't be replaced easily.

Basically there shall be is a way to do it automatically by a CAD plugin.

[gkasprow]

I can enable any combinations of properties I've shown you just with one click. so OK. For resistors only case makes sense because tolerance is already printed on the symbol. For capacitors I can enable dielectric only where it is essential. Rest we simply assume X5R/X7R. It does not make sense to enable any additional parameters for resistor supplying LED

[a-shafir]

@gkasprow OK. I think I see an elegant solution for this! What shall be done is literally packing the non-readable very long string (refer to the example you captured) by a simple pattern (literally a RegExp or similar). It can be done by a script. I will try to make such script that will work with the altium files.

How it sounds?

[a-shafir]

@gkasprow your idea is also working. Of course need to show it smart and to the point exactly when you need to use ctrl-f to verify the attribute is not missing. Doing this automatically by a tool is more robust because it will pop-up any "unexpected" attributes like the copy-paste errors etc.

[gkasprow]

I'm not going to copy and paste anything. I can simply enable visibility of certain parameters in the places that they are essential.