Picotiny example fails during Place & Route

[Slamy]

With Gowin_V1.9.9Beta-4_Education it seems I'm unable to place and route the picotiny example.

ERROR (PA2122) : Not support 'mem_mem_0_0_s'(DPB) WRITE_MODE0 = 2'b10, please change write mode WRITE_MODE0 = 2'b00 or 2'b01.

I've tried to read through https://wiki.sipeed.com/hardware/en/tang/Tang-Nano-9K/examples/picorv.html but such a problem is not mentioned. This is my first time I tried to build a Gowin FPGA project so I'm a little bit lost. I tried searching for this online but I'm also unable to find anything about this.

[djfergus]

I have the exact same error. The only write modes I can see in the code are set correctly

defparam sp_inst_0.WRITE_MODE = 2'b00; 

in the following files:

sram_2kx8.v
bootram_2kx8_0.v
bootram_2kx8_1.v
bootram_2kx8_2.v
bootram_2kx8_3.v

The HDMI and LCD examples compiled fine for me and worked with my tang nano 9k.

What is DPB? I see it listed in the Synthesis report under resource usage summary:

BSRAM   12
    SP      8
    SDPB    2
    DPB     1
    pROM    1

[djfergus]

Found it: Tools -> IP Core Generator -> Hard Module -> Memory -> Block Memory -> DPB

Still can't work out why DPB throws an error when it is not referenced in the project design files.

FWIW I can flash the included picotiny.fs file and it works fine.

[saahinduran]

Hello, I am having the same problem. I did flash the prebuilt picotiny.fs file and it worked. However, I still want to be able to synthesize the project for customization.

[dashxdr]

If you use the Gowin_V1.9.9Beta-4_Education version you don't need to get a license key, but when you build anything the netlist appears encrypted. I requested a license key and within a few hours I received one through email, and that allowed me to use the Gowin_V1.9.9_linux.tar.gz IDE. It fails with the same error "...WRITE_MODE0 = 2'b10..." but I was able to see what the automatically instantiated DPB mem_mem_0_0 is connected to by looking for mem_mem_0 in the netlist.

It uses mem_port[AB]_rdata, mem_port[AB]_wdata, mem_portA_wen, and pipeline_en among other things. pipeline_en is only associated with the 'B' side of the dual port memory, and mem_portA_wen is associated with the 'A' side of the dual port memory. From this I figured out the file picotiny/hw/hdmi/svo_term.v was causing the problem:

https://github.com/sipeed/TangNano-9K-example/blob/main/picotiny/hw/hdmi/svo_term.v#L101

mem_portA_rdata <= 'bx; Just comment out that line. // mem_portA_rdata <= 'bx; That fixes the problem. Then later I got an error because pins 59, 60, 61 and 62 (flash_clk, flash_csb, flash_mosi and flash_miso) are conflicting with the MSPI. I fixed this by going to the menu Project -> Configuration and then selecting inside Place&Route the Dual-Purpose Pin tab, and I checked the box "Use MSPI as regular IO". Then the project built fine. See the attached image for convenience.

[saahinduran]

Great work! Thanks a lot. @dashxdr I will give it a try at my first convenience and I will report the results. !