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sy2002 / QNICE-FPGA

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
http://qnice-fpga.com
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Repeat performance tests, document in doc/MIPS.md and update emulator and website #71

Closed sy2002 closed 4 years ago

sy2002 commented 4 years ago

Repeat speed tests after having corrected the instruction counter. Do them at least on Nexys4DDR using a Vivado. Note all values and create an average. It seems it is only 12.0 MIPS in Q-TRIS. Retest: After having done real speed tests: Adjust all the 12.9 MIPS claims to 12.12 MIPS (also in emulator, documentation, various README.MDs, website): the spectrum is between 12.12 MIPS in Q-TRIS and 13.18 MIPS in mandel_perf_test

sy2002 commented 4 years ago

Result of repeated performance tests: The new ISA leads to a speed increase of about 7% as documented in q-tris_perf_test.asm compared to the old ISA. The main reason is, that the new INCRB/DECRB only need two cycles compared to 4 cycles when switching banks the old way. This leads to faster sub-routine calls.

Two TODOs are related to this:

  1. Adjust Q-TRIS (slow it down) to match the new speed
  2. Adjust the VGA and WASM version of the emulator and all documentation about MIPS in emulator/README.md and the qnice-fpga homepage
sy2002 commented 4 years ago

Done.