sy2002 / QNICE-FPGA

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
http://qnice-fpga.com
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16-bit assembler c cpu fpga fpga-game fpga-tutorial learn-fpga open-hardware qnice sd-card soft-core system-on-chip tutorial vga vhdl vhdl-examples vhdl-tutorial

QNICE-FPGA 16-bit System-on-a-Chip

QNICE_Intro_Img

What is QNICE-FPGA?

QNICE-FPGA is a 16-bit computer system build as a fully-fledged system-on-a-chip in portable VHDL on an FPGA. Specifications:

The main purpose of QNICE-FPGA is learning, teaching and having fun.

Platforms

Due to the portable nature of the way this project has been developed, QNICE-FPGA is able to run on any sufficiently powerful FPGA platform. Additionally, there is an emulator available for macOS, Linux and WebGL.

Out of the box, this repository contains support for the Nexys4 DDR and Nexys A7 development boards as well as for the MEGA65.

Nexys4 DDR and Nexys A7 MEGA65
Nexys_Img MEGA65_Img

Getting Started

If you do have FPGA hardware, then read on to learn how to get started. If you don't, then you might want to use the emulator to experience QNICE: Try it online or have a look at emulator/README.md to learn how to build and run your own emulator.

Get started using actual FPGA hardware:

Using the File System

Q-TRIS

Q-TRIS is a Tetris clone and the first game ever developed for QNICE-FPGA. The rules of the game are very close to the "official" Tetris rules as they can be found on http://tetris.wikia.com/wiki/Tetris_Guideline.

Q_TRIS_IMG

Clearing a larger amount of lines at once (e.g. Double, Triple, Q-TRIS) leads to much higher scores. Clearing a certain treshold of lines leads to the next level. The game speed increases from level to level. If you clear 1.000 lines, then you win the game.

Q-TRIS uses the PS2/USB keyboard and VGA, no matter how STDIN/STDOUT are routed. All speed calculations are based on a 50 MHz CPU that is equal to the CPU revision contained in release V1.4.

Have a look at the current highscore in doc/demos/q-tris-highscore.txt.

The game can run stand-alone, i.e. instead of the Monitor as the "ROM" for the QNICE-FPGA: Just use dist_kit/bin/QTRIS-V16.bit instead of the above-mentioned dist_kit/bin/QNICE-V16.bit. Or, you can run it regularly as an app within the Monitor environment:

Memory map

The QNICE CPU has a 16-bit address bus and a 16-bit data bus. Each value of the memory address bus addresses an entire 16-bit word. There is no byte-level access. So the total memory area addressable by the QNICE CPU is 64 kWords = 128 kBytes.

In the QNICE system the following simple memory map is used:

Address Use
0000 - 7FFF ROM (32 kW = 64 kB)
8000 - FEFF RAM (32 kW = 64 kB)
FF00 - FFFF Memory Mapped I/O devices

I/O devices

The I/O memory area is divided into chunks of 8 words, leading to a total of 32 possible I/O devices.

Address Use
FF00 - FF07 Fundamental I/O (switches, TIL, keyboard)
FF08 - FF0F System Counters (cycles and instructions)
FF10 - FF17 UART
FF18 - FF1F EAE
FF20 - FF27 SD CARD
FF28 - FF2F Timers
FF30 - FF37 VGA
FF38 - FF3F VGA
FF40 - FFEF Reserved
FFF0 - FFFF HyperRAM (MEGA65)

The registers for the individual I/O devices are described in the assembler header file monitor/sysdef.asm.

Programming in Assembler

Programming in C

QNICE also features a fully-fledged C programming environment. This is how you are getting started:

Documentation

If you are new to QNICE-FPGA, then reading the documentation in the following order is recommended:

  1. Introduction to the QNICE Instruction Set Architecture

  2. Hardware: Description of supported hardware platforms, how to build, and guides for porting to other platforms

  3. Overview of directory structure and available documentation as well as QNICE-FPGA basics such as STDIN/STDOUT routing, file transfer mechanisms and platform specifics

  4. Emulator and mounting FAT32 devices

  5. Constraints

  6. Programming Best Practices

  7. Programming Card

Acknowledgements