(C) Copyright 2000 - 2013

OPTIONS

make CHANGELOG
This is the README file for the U-Boot project.
include/asm-ppc/u-boot.h

#include <asm/u-boot.h>
U_BOOT_VERSION      u_boot_logo
IH_OS_U_BOOT        u_boot_hush_start
cd u-boot
make TQM823L_defconfig
- arch/arm/cpu/armv7/start.S
- arch/powerpc/cpu/mpc83xx/start.S
- arch/mips/cpu/start.S
CONFIG_SYS_MEASURE_CPUCLK

Define this to measure the actual CPU clock instead
of relying on the correctness of the configured
values. Mostly useful for board bringup to make sure
the PLL is locked at the intended frequency. Note
that this requires a (stable) reference clock (32 kHz
RTC clock or CONFIG_SYS_8XX_XIN)

CONFIG_SYS_DELAYED_ICACHE

Define this option if you want to enable the
ICache only when Code runs from RAM.
Specifies that the core is a 64-bit PowerPC implementation (implements
the "64" category of the Power ISA). This is necessary for ePAPR
compliance, among other possible reasons.

CONFIG_SYS_FSL_TBCLK_DIV

Defines the core time base clock divider ratio compared to the
system clock.  On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32.  The ratio varies from SoC to Soc.

CONFIG_SYS_FSL_PCIE_COMPAT

Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.

CONFIG_SYS_PPC_E500_DEBUG_TLB

Enables a temporary TLB entry to be used during boot to work
around limitations in e500v1 and e500v2 external debugger
support. This reduces the portions of the boot code where
breakpoints and single stepping do not work.  The value of this
symbol should be set to the TLB1 entry to be used for this
purpose.

CONFIG_SYS_FSL_ERRATUM_A004510

Enables a workaround for erratum A004510.  If set,
then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.

CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)

Defines one or two SoC revisions (low 8 bits of SVR)
for which the A004510 workaround should be applied.

The rest of SVR is either not relevant to the decision
of whether the erratum is present (e.g. p2040 versus
p2041) or is implied by the build target, which controls
whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.

See Freescale App Note 4493 for more information about
this erratum.

CONFIG_A003399_NOR_WORKAROUND
Enables a workaround for IFC erratum A003399. It is only
required during NOR boot.

CONFIG_A008044_WORKAROUND
Enables a workaround for T1040/T1042 erratum A008044. It is only
required during NAND boot and valid for Rev 1.0 SoC revision

CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY

This is the value to write into CCSR offset 0x18600
according to the A004510 workaround.

CONFIG_SYS_FSL_DSP_DDR_ADDR
This value denotes start offset of DDR memory which is
connected exclusively to the DSP cores.

CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
This value denotes start offset of M2 memory
which is directly connected to the DSP core.

CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
This value denotes start offset of M3 memory which is directly
connected to the DSP core.

CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
This value denotes start offset of DSP CCSR space.

CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL SoC's.
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.

CONFIG_SYS_CPC_REINIT_F
This CONFIG is defined when the CPC is configured as SRAM at the
time of U-Boot entry and is required to be re-initialized.

CONFIG_DEEP_SLEEP
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN

Defines the endianess of the CPU. Implementation of those
values is arch specific.

CONFIG_SYS_FSL_DDR
Freescale DDR driver in use. This type of DDR controller is
found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
SoCs.

CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.

CONFIG_SYS_FSL_DDR_EMU
Specify emulator support for DDR. Some DDR features such as
deskew training are not available.

CONFIG_SYS_FSL_DDRC_GEN1
Freescale DDR1 controller.

CONFIG_SYS_FSL_DDRC_GEN2
Freescale DDR2 controller.

CONFIG_SYS_FSL_DDRC_GEN3
Freescale DDR3 controller.

CONFIG_SYS_FSL_DDRC_GEN4
Freescale DDR4 controller.

CONFIG_SYS_FSL_DDRC_ARM_GEN3
Freescale DDR3 controller for ARM-based SoCs.

CONFIG_SYS_FSL_DDR1
Board config to use DDR1. It can be enabled for SoCs with
Freescale DDR1 or DDR2 controllers, depending on the board
implemetation.

CONFIG_SYS_FSL_DDR2
Board config to use DDR2. It can be enabled for SoCs with
Freescale DDR2 or DDR3 controllers, depending on the board
implementation.

CONFIG_SYS_FSL_DDR3
Board config to use DDR3. It can be enabled for SoCs with
Freescale DDR3 or DDR3L controllers.

CONFIG_SYS_FSL_DDR3L
Board config to use DDR3L. It can be enabled for SoCs with
DDR3L controllers.

CONFIG_SYS_FSL_DDR4
Board config to use DDR4. It can be enabled for SoCs with
DDR4 controllers.

CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian

CONFIG_SYS_FSL_IFC_LE
Defines the IFC controller register space as Little Endian

CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in built image.
Please refer doc/README.pblimage for more details

CONFIG_SYS_FSL_PBL_RCW
It adds PBI(pre-boot instructions) commands in u-boot build image.
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details

CONFIG_SPL_FSL_PBL
It adds a target to create boot binary having SPL binary in PBI format
concatenated with u-boot binary.

CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian

CONFIG_SYS_FSL_DDR_LE
Defines the DDR controller register space as Little Endian

CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
Physical address from the view of DDR controllers. It is the
same as CONFIG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
it could be different for ARM SoCs.

CONFIG_SYS_FSL_DDR_INTLV_256B
DDR controller interleaving on 256-byte. This is a special
interleaving mode, handled by Dickens for Freescale layerscape
SoCs with ARM core.

CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
Number of controllers used as main memory.

CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
Number of controllers used for other than main memory.

CONFIG_SYS_FSL_HAS_DP_DDR
Defines the SoC has DP-DDR used for DPAA.

CONFIG_SYS_FSL_SEC_BE
Defines the SEC controller register space as Big Endian

CONFIG_SYS_FSL_SEC_LE
Defines the SEC controller register space as Little Endian
Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
pointer. This is needed for the temporary stack before
relocation.

CONFIG_SYS_MIPS_CACHE_MODE

Cache operation mode for the MIPS CPU.
See also arch/mips/include/asm/mipsregs.h.
Possible values are:
    CONF_CM_CACHABLE_NO_WA
    CONF_CM_CACHABLE_WA
    CONF_CM_UNCACHED
    CONF_CM_CACHABLE_NONCOHERENT
    CONF_CM_CACHABLE_CE
    CONF_CM_CACHABLE_COW
    CONF_CM_CACHABLE_CUW
    CONF_CM_CACHABLE_ACCELERATED

CONFIG_SYS_XWAY_EBU_BOOTCFG

Special option for Lantiq XWAY SoCs for booting from NOR flash.
See also arch/mips/cpu/mips32/start.S.

CONFIG_XWAY_SWAP_BYTES

Enable compilation of tools/xway-swap-bytes needed for Lantiq
XWAY SoCs for booting from NOR flash. The U-Boot image needs to
be swapped if a flash programmer is used.
Select high exception vectors of the ARM core, e.g., do not
clear the V bit of the c1 register of CP15.

CONFIG_SYS_THUMB_BUILD

Use this flag to build U-Boot using the Thumb instruction
set for ARM architectures. Thumb instruction set provides
better code density. For ARM architectures that support
Thumb2 this flag will result in Thumb2 code generated by
GCC.

CONFIG_ARM_ERRATA_716044
CONFIG_ARM_ERRATA_742230
CONFIG_ARM_ERRATA_743622
CONFIG_ARM_ERRATA_751472
CONFIG_ARM_ERRATA_761320
CONFIG_ARM_ERRATA_773022
CONFIG_ARM_ERRATA_774769
CONFIG_ARM_ERRATA_794072

If set, the workarounds for these ARM errata are applied early
during U-Boot startup. Note that these options force the
workarounds to be applied; no CPU-type/version detection
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!

COUNTER_FREQUENCY
Generic timer clock source frequency.

COUNTER_FREQUENCY_REAL
Generic timer clock source frequency if the real clock is
different from COUNTER_FREQUENCY, and can only be determined
at run time.

NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
CONFIG_ARM_ERRATA_430973
CONFIG_ARM_ERRATA_454179
CONFIG_ARM_ERRATA_621766
CONFIG_ARM_ERRATA_798870
CONFIG_ARM_ERRATA_801819
Support executing U-Boot in non-secure (NS) mode. Certain
impossible actions will be skipped if the CPU is in NS mode,
such as ARM architectural timer initialization.
U-Boot stores all clock information in Hz
internally. For binary compatibility with older Linux
kernels (which expect the clocks passed in the
bd_info data to be in MHz) the environment variable
"clocks_in_mhz" can be defined so that U-Boot
converts clock data to MHZ before passing it to the
Linux kernel.
When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
"clocks_in_mhz=1" is automatically included in the
default environment.

CONFIG_MEMSIZE_IN_BYTES     [relevant for MIPS only]

When transferring memsize parameter to Linux, some versions
expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.

CONFIG_OF_LIBFDT

New kernel versions are expecting firmware settings to be
passed using flattened device trees (based on open firmware
concepts).

CONFIG_OF_LIBFDT
 * New libfdt-based support
 * Adds the "fdt" command
 * The bootm command automatically updates the fdt

OF_CPU - The proper name of the cpus node (only required for
    MPC512X and MPC5xxx based boards).
OF_SOC - The proper name of the soc node (only required for
    MPC512X and MPC5xxx based boards).
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device

boards with QUICC Engines require OF_QE to set UCC MAC
addresses

CONFIG_OF_BOARD_SETUP

Board code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel

CONFIG_OF_SYSTEM_SETUP

Other code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel.
This causes ft_system_setup() to be called before booting
the kernel.

CONFIG_OF_IDE_FIXUP

U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.

CONFIG_MACH_TYPE    [relevant for ARM only][mandatory]

This setting is mandatory for all boards that have only one
machine type and must be used to specify the machine type
number as it appears in the ARM machine registry
(see http://www.arm.linux.org.uk/developer/machines/).
Only boards that have multiple machine types supported
in a single configuration file and the machine type is
runtime discoverable, do not have to use this setting.
bootvx constructs a valid bootline using the following
environments variables: bootdev, bootfile, ipaddr, netmask,
serverip, gatewayip, hostname, othbootargs.
It loads the vxWorks image pointed bootfile.

Note: If a "bootargs" environment is defined, it will overwride
the defaults discussed just above.
Define this if you want support for Amba PrimeCell PL010 UARTs.

CONFIG_PL011_SERIAL

Define this if you want support for Amba PrimeCell PL011 UARTs.

CONFIG_PL011_CLOCK

If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs.

CONFIG_PL01x_PORTS

If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h

CONFIG_SERIAL_HW_FLOW_CONTROL

Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
Note: if CONFIG_8xx_CONS_NONE is defined, the serial
port routines must be defined elsewhere
(i.e. serial_init(), serial_getc(), ...)
CONFIG_BOOTARGS
This can be used to pass arguments to the bootm
command. The value of CONFIG_BOOTARGS goes into the
environment value "bootargs".

CONFIG_RAMBOOT and CONFIG_NFSBOOT
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
as a convenience, when switching between booting from
RAM and NFS.
CONFIG_BOOTCOUNT_ENV
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is used. If "upgrade_available" is
0, "bootcount" is always 0, if "upgrade_available" is
1 "bootcount" is incremented in the environment.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0, if a boot was successfully.
When this option is #defined, the existence of the
environment variable "preboot" will be checked
immediately before starting the CONFIG_BOOTDELAY
countdown and/or running the auto-boot command resp.
entering interactive mode.

This feature is especially useful when "preboot" is
automatically generated or modified. For an example
see the LWMON board specific code: here "preboot" is
modified when the user holds down a certain
combination of keys on the (special) keyboard when
booting the systems
U-Boot needs to get its device tree from somewhere. This can
be done using one of the two options below:

CONFIG_OF_EMBED
If this variable is defined, U-Boot will embed a device tree
binary in its image. This device tree file should be in the
board directory and called <soc>-<board>.dts. The binary file
is then picked up in board_init_f() and made available through
the global data structure as gd->blob.

CONFIG_OF_SEPARATE
If this variable is defined, U-Boot will build a device tree
binary. It will be called u-boot.dtb. Architecture-specific
code will locate it at run-time. Generally this works by:

    cat u-boot.bin u-boot.dtb >image.bin

and in fact, U-Boot does this for you, creating a file called
u-boot-dtb.bin which is useful in the common case. You can
still use the individual files if you need something more
exotic.
CONFIG_HW_WATCHDOG
When using a watchdog circuitry external to the used
SoC, then define this variable and provide board
specific code for the "hw_watchdog_reset" function.

CONFIG_AT91_HW_WDT_TIMEOUT
specify the timeout in seconds. default 2 seconds.
When CONFIG_CMD_DATE is selected, the type of the RTC
has to be selected, too. Define exactly one of the
following options:

CONFIG_RTC_MPC8xx   - use internal RTC of MPC8xx
CONFIG_RTC_PCF8563  - use Philips PCF8563 RTC
CONFIG_RTC_MC13XXX  - use MC13783 or MC13892 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
CONFIG_RTC_DS1307   - use Maxim, Inc. DS1307 RTC
CONFIG_RTC_DS1337   - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS1338   - use Maxim, Inc. DS1338 RTC
CONFIG_RTC_DS1339   - use Maxim, Inc. DS1339 RTC
CONFIG_RTC_DS164x   - use Dallas DS164x RTC
CONFIG_RTC_ISL1208  - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900  - use Maxim, Inc. MAX6900 RTC
CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
CONFIG_SYS_RV3029_TCR   - enable trickle charger on
              RV3029 RTC.

Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
chip-ngpio pairs that tell the PCA953X driver the number of
pins supported by a particular chip.

Note that if the GPIO device uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
Example output from the 'iotrace stats' command is below.
Note that if the trace buffer is exhausted, the checksum will
still continue to operate.

    iotrace is enabled
    Start:  10000000    (buffer start address)
    Size:   00010000    (buffer size)
    Offset: 00000120    (current buffer offset)
    Output: 10000120    (start + offset)
    Count:  00000018    (number of trace records)
    CRC32:  9526fb66    (CRC32 of all trace records)
When CONFIG_TIMESTAMP is selected, the timestamp
(date and time) of an image is printed by image
commands like bootm or iminfo. This option is
automatically enabled when you select CONFIG_CMD_DATE .
If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
CONFIG_IDE_RESET - is this is defined, IDE Reset will
be performed by calling the function
    ide_set_reset(int reset)
which has to be defined in a board specific file
Set this to enable ATAPI support.
Set this to enable support for disks larger than 137GB
Also look at CONFIG_SYS_64BIT_LBA.
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.

CONFIG_SYS_64BIT_LBA:
    When enabled, makes the IDE subsystem use 64bit sector addresses.
    Default is 32bit.
CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
maximum numbers of LUNs, SCSI ID's and target
devices.
CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)

The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
This does not do anything useful unless you set at least one
of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.

CONFIG_E1000_SPI_GENERIC
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.

CONFIG_CMD_E1000
Management command for E1000 devices.  When used on devices
with SPI support you can reprogram the EEPROM from U-Boot.

CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
write routine for first time initialisation.

CONFIG_TULIP
Support for Digital 2114x chips.
Optional CONFIG_TULIP_SELECT_MEDIA for board specific
modem chip initialisation (KS8761/QS6611).

CONFIG_NATSEMI
Support for National dp83815 chips.

CONFIG_NS8382X
Support for National dp8382[01] gigabit chips.
CONFIG_DRIVER_AT91EMAC
Support for AT91RM9200 EMAC.

    CONFIG_RMII
    Define this to use reduced MII inteface

    CONFIG_DRIVER_AT91EMAC_QUIET
    If this defined, the driver is quiet.
    The driver doen't show link status messages.

CONFIG_CALXEDA_XGMAC
Support for the Calxeda XGMAC device

CONFIG_LAN91C96
Support for SMSC's LAN91C96 chips.

    CONFIG_LAN91C96_USE_32_BIT
    Define this to enable 32 bit addressing

CONFIG_SMC91111
Support for SMSC's LAN91C111 chip

    CONFIG_SMC91111_BASE
    Define this to hold the physical address
    of the device (I/O space)

    CONFIG_SMC_USE_32_BIT
    Define this if data bus is 32 bits

    CONFIG_SMC_USE_IOFUNCS
    Define this to use i/o functions instead of macros
    (some hardware wont work with macros)

CONFIG_DRIVER_TI_EMAC
Support for davinci emac

    CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
    Define this if you have more then 3 PHYs.

CONFIG_FTGMAC100
Support for Faraday's FTGMAC100 Gigabit SoC Ethernet

    CONFIG_FTGMAC100_EGIGA
    Define this to use GE link update with gigabit PHY.
    Define this if FTGMAC100 is connected to gigabit PHY.
    If your system has 10/100 PHY only, it might not occur
    wrong behavior. Because PHY usually return timeout or
    useless data when polling gigabit status and gigabit
    control registers. This behavior won't affect the
    correctnessof 10/100 link speed update.

CONFIG_SMC911X
Support for SMSC's LAN911x and LAN921x chips

    CONFIG_SMC911X_BASE
    Define this to hold the physical address
    of the device (I/O space)

    CONFIG_SMC911X_32_BIT
    Define this if data bus is 32 bits

    CONFIG_SMC911X_16_BIT
    Define this if data bus is 16 bits. If your processor
    automatically converts one 32 bit word to two 16 bit
    words you may also try CONFIG_SMC911X_32_BIT.

CONFIG_SH_ETHER
Support for Renesas on-chip Ethernet controller

    CONFIG_SH_ETHER_USE_PORT
    Define the number of ports to be used

    CONFIG_SH_ETHER_PHY_ADDR
    Define the ETH PHY's address

    CONFIG_SH_ETHER_CACHE_WRITEBACK
    If this option is set, the driver enables cache flush.
CONFIG_TPM_TIS_INFINEON
Support for Infineon i2c bus TPM devices. Only one device
per system is supported at this time.

    CONFIG_TPM_TIS_I2C_BURST_LIMITATION
    Define the burst count bytes upper limit

CONFIG_TPM_ST33ZP24
Support for STMicroelectronics TPM devices. Requires DM_TPM support.

    CONFIG_TPM_ST33ZP24_I2C
    Support for STMicroelectronics ST33ZP24 I2C devices.
    Requires TPM_ST33ZP24 and I2C.

    CONFIG_TPM_ST33ZP24_SPI
    Support for STMicroelectronics ST33ZP24 SPI devices.
    Requires TPM_ST33ZP24 and SPI.

CONFIG_TPM_ATMEL_TWI
Support for Atmel TWI TPM device. Requires I2C support.

CONFIG_TPM_TIS_LPC
Support for generic parallel port TPM devices. Only one device
per system is supported at this time.

    CONFIG_TPM_TIS_BASE_ADDRESS
    Base address where the generic TPM device is mapped
    to. Contemporary x86 systems usually map it at
    0xfed40000.

CONFIG_CMD_TPM
Add tpm monitor functions.
Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
provides monitor access to authorized functions.

CONFIG_TPM
Define this to enable the TPM support library which provides
functional interfaces to some TPM commands.
Requires support for a TPM device.

CONFIG_TPM_AUTH_SESSIONS
Define this to enable authorized functions in the TPM library.
Requires CONFIG_TPM and CONFIG_SHA1.
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.

CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
HW module registers.
else if using cdc_acm, simply setting the environment
variable usbtty to be cdc_acm should suffice. The following
might be defined in YourBoardName.h

    CONFIG_USB_DEVICE
    Define this to build a UDC device

    CONFIG_USB_TTY
    Define this to have a tty type of device available to
    talk to the UDC device

    CONFIG_USBD_HS
    Define this to enable the high speed support for usb
    device and usbtty. If this feature is enabled, a routine
    int is_usbd_high_speed(void)
    also needs to be defined by the driver to dynamically poll
    whether the enumeration has succeded at high speed or full
    speed.

    CONFIG_SYS_CONSOLE_IS_IN_ENV
    Define this if you want stdin, stdout &/or stderr to
    be set to usbtty.

    mpc8xx:
        CONFIG_SYS_USB_EXTC_CLK 0xBLAH
        Derive USB clock from external clock "blah"
        - CONFIG_SYS_USB_EXTC_CLK 0x02

If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
or directly in usbd_vendor_info.h. If you don't define
CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
should pretend to be a Linux device to it's target host.

    CONFIG_USBD_MANUFACTURER
    Define this string as the name of your company for
    - CONFIG_USBD_MANUFACTURER "my company"

    CONFIG_USBD_PRODUCT_NAME
    Define this string as the name of your product
    - CONFIG_USBD_PRODUCT_NAME "acme usb device"

    CONFIG_USBD_VENDORID
    Define this as your assigned Vendor ID from the USB
    Implementors Forum. This *must* be a genuine Vendor ID
    to avoid polluting the USB namespace.
    - CONFIG_USBD_VENDORID 0xFFFF

    CONFIG_USBD_PRODUCTID
    Define this as the unique Product ID
    for your device
    - CONFIG_USBD_PRODUCTID 0xFFFF
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller

    CONFIG_SH_MMCIF_ADDR
    Define the base address of MMCIF registers

    CONFIG_SH_MMCIF_CLK
    Define the clock frequency for MMCIF

CONFIG_GENERIC_MMC
Enable the generic MMC driver

CONFIG_SUPPORT_EMMC_BOOT
Enable some additional features of the eMMC boot partitions.

CONFIG_SUPPORT_EMMC_RPMB
Enable the commands for reading, writing and programming the
key for the Replay Protection Memory Block partition in eMMC.
CONFIG_CMD_DFU
This enables the command "dfu" which is used to have
U-Boot create a DFU class device via USB.  This command
requires that the "dfu_alt_info" environment variable be
set and define the alt settings to expose to the host.

CONFIG_DFU_MMC
This enables support for exposing (e)MMC devices via DFU.

CONFIG_DFU_NAND
This enables support for exposing NAND devices via DFU.

CONFIG_DFU_RAM
This enables support for exposing RAM via DFU.
Note: DFU spec refer to non-volatile memory usage, but
allow usages beyond the scope of spec - here RAM usage,
one that would help mostly the developer.

CONFIG_SYS_DFU_DATA_BUF_SIZE
Dfu transfer uses a buffer before writing data to the
raw storage device. Make the size (in bytes) of this buffer
configurable. The size of this buffer is also configurable
through the "dfu_bufsiz" environment variable.

CONFIG_SYS_DFU_MAX_FILE_SIZE
When updating files rather than the raw storage device,
we use a static buffer to copy the file into and then write
the buffer once we've been given the whole file.  Define
this to the maximum filesize (in bytes) for the buffer.
Default is 4 MiB if undefined.

DFU_DEFAULT_POLL_TIMEOUT
Poll timeout [ms], is the timeout a device can send to the
host. The host must wait for this timeout before sending
a subsequent DFU_GET_STATUS request to the device.

DFU_MANIFEST_POLL_TIMEOUT
Poll timeout [ms], which the device sends to the host when
entering dfuMANIFEST state. Host waits this timeout, before
sending again an USB request to the device.
CONFIG_CMD_FASTBOOT
This enables the command "fastboot" which enables the Android
fastboot mode for the platform's USB device. Fastboot is a USB
protocol for downloading images, flashing and device control
used on Android devices.
See doc/README.android-fastboot for more information.

CONFIG_ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.

CONFIG_FASTBOOT_BUF_ADDR
The fastboot protocol requires a large memory buffer for
downloads. Define this to the starting RAM address to use for
downloaded images.

CONFIG_FASTBOOT_BUF_SIZE
The fastboot protocol requires a large memory buffer for
downloads. This buffer should be as large as possible for a
platform. Define this to the size available RAM for fastboot.

CONFIG_FASTBOOT_FLASH
The fastboot protocol includes a "flash" command for writing
the downloaded image to a non-volatile storage device. Define
this to enable the "fastboot flash" command.

CONFIG_FASTBOOT_FLASH_MMC_DEV
The fastboot "flash" command requires additional information
regarding the non-volatile storage device. Define this to
the eMMC device that fastboot should use to store the image.

CONFIG_FASTBOOT_GPT_NAME
The fastboot "flash" command supports writing the downloaded
image to the Protective MBR and the Primary GUID Partition
Table. (Additionally, this downloaded image is post-processed
to generate and write the Backup GUID Partition Table.)
This occurs when the specified "partition name" on the
"fastboot flash" command line matches this value.
The default is "gpt" if undefined.

CONFIG_FASTBOOT_MBR_NAME
The fastboot "flash" command supports writing the downloaded
image to DOS MBR.
This occurs when the "partition name" specified on the
"fastboot flash" command line matches this value.
If not defined the default value "mbr" is used.
CONFIG_SYS_JFFS2_FIRST_SECTOR,
CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
Define these for a default partition on a NOR device
Define this to enable support for saving memory data as a
file in FAT formatted partition.

This will also enable the command "fatwrite" enabling the
user to write files to FAT.
Define this to enable support for reading from a Coreboot
filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
and cbfsload.
Define the max cluster size for fat operations else
a default value of 65536 will be defined.
CONFIG_KEYBOARD

Define this to enable a custom keyboard support.
This simply calls drv_keyboard_init() which must be
defined in your board-specific files. This option is deprecated
and is only used by novena. For new boards, use driver model
instead.
    CONFIG_SYS_DIU_ADDR
    CONFIG_VIDEO
    CONFIG_CMD_BMP
    CONFIG_CFB_CONSOLE
    CONFIG_VIDEO_SW_CURSOR
    CONFIG_VGA_AS_SINGLE_DEVICE
    CONFIG_VIDEO_LOGO
    CONFIG_VIDEO_BMP_LOGO

The DIU driver will look for the 'video-mode' environment
variable, and if defined, enable the DIU as a console during
boot.  See the documentation file doc/README.video for a
description of this variable.
Define this to enable LCD support (for output to LCD
display); also select one of the supported displays
by defining one of these:

CONFIG_ATMEL_LCD:

    HITACHI TX09D70VM1CCA, 3.5", 240x320.

CONFIG_NEC_NL6448AC33:

    NEC NL6448AC33-18. Active, color, single scan.

CONFIG_NEC_NL6448BC20

    NEC NL6448BC20-08. 6.5", 640x480.
    Active, color, single scan.

CONFIG_NEC_NL6448BC33_54

    NEC NL6448BC33-54. 10.4", 640x480.
    Active, color, single scan.

CONFIG_SHARP_16x9

    Sharp 320x240. Active, color, single scan.
    It isn't 16x9, and I am not sure what it is.

CONFIG_SHARP_LQ64D341

    Sharp LQ64D341 display, 640x480.
    Active, color, single scan.

CONFIG_HLD1045

    HLD1045 display, 640x480.
    Active, color, single scan.

CONFIG_OPTREX_BW

    Optrex   CBL50840-2 NF-FW 99 22 M5
    or
    Hitachi  LMG6912RPFC-00T
    or
    Hitachi  SP14Q002

    320x240. Black & white.

Normally display is black on white background; define
CONFIG_SYS_WHITE_ON_BLACK to get it inverted.

CONFIG_LCD_ALIGNMENT

Normally the LCD is page-aligned (typically 4KB). If this is
defined then the LCD will be aligned to this value instead.
For ARM it is sometimes useful to use MMU_SECTION_SIZE
here, since it is cheaper to change data cache settings on
a per-section basis.

CONFIG_LCD_ROTATION

Sometimes, for example if the display is mounted in portrait
mode or even if it's mounted landscape but rotated by 180degree,
we need to rotate our content of the display relative to the
framebuffer, so that user can read the messages which are
printed out.
Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
initialized with a given rotation from "vl_rot" out of
"vidinfo_t" which is provided by the board specific code.
The value for vl_rot is coded as following (matching to
fbcon=rotate:<n> linux-kernel commandline):
0 = no rotation respectively 0 degree
1 = 90 degree rotation
2 = 180 degree rotation
3 = 270 degree rotation

If CONFIG_LCD_ROTATION is not defined, the console will be
initialized with 0degree rotation.

CONFIG_LCD_BMP_RLE8

Support drawing of RLE8-compressed bitmaps on the LCD.

CONFIG_I2C_EDID

Enables an 'i2c edid' command which can read EDID
information over I2C from an attached LCD display.
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is suppressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.

CONFIG_SPLASHIMAGE_GUARD

If this option is set, then U-Boot will prevent the environment
variable "splashimage" from being set to a problematic address
(see doc/README.displaying-bmps).
This option is useful for targets where, due to alignment
restrictions, an improperly aligned BMP image will cause a data
abort. If you think you will not have problems with unaligned
accesses (for example because your toolchain prevents them)
there is no need to set this option.

CONFIG_SPLASH_SCREEN_ALIGN

If this option is set the splash image can be freely positioned
on the screen. Environment variable "splashpos" specifies the
position as "x,y". If a positive number is given it is used as
number of pixel from left/top. If a negative number is given it
is used as number of pixel from right/bottom. You can also
specify 'm' for centering the image.

Example:
setenv splashpos m,m
    => image at center of screen

setenv splashpos 30,20
    => image at x = 30 and y = 20

setenv splashpos -10,m
    => vertically centered image
       at x = dspWidth - bmpWidth - 9
If this option is set, additionally to standard BMP
images, gzipped BMP images can be displayed via the
splashscreen support or the bmp command.
If this option is set, 8-bit RLE compressed BMP images
can be displayed via the splashscreen support or the
bmp command.
If this option is set, it would use zlib deflate method
to compress the specified memory at its best effort.
Enabled by default to support gzip compressed images.

CONFIG_BZIP2

If this option is set, support for bzip2 compressed
images is included. If not, only uncompressed and gzip
compressed images are supported.

NOTE: the bzip2 algorithm requires a lot of RAM, so
the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
be at least 4MB.

CONFIG_LZMA

If this option is set, support for lzma compressed
images is included.

Note: The LZMA algorithm adds between 2 and 4KB of code and it
requires an amount of dynamic memory that is given by the
formula:

    (1846 + 768 << (lc + lp)) * sizeof(uint16)

Where lc and lp stand for, respectively, Literal context bits
and Literal pos bits.

This value is upper-bounded by 14MB in the worst case. Anyway,
for a ~4MB large kernel image, we have lc=3 and lp=0 for a
total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
a very small buffer.

Use the lzmainfo tool to determinate the lc and lp values and
then calculate the amount of needed dynamic memory (ensuring
the appropriate CONFIG_SYS_MALLOC_LEN value).

CONFIG_LZO

If this option is set, support for LZO compressed images
is included.
The address of PHY on MII bus.

CONFIG_PHY_CLOCK_FREQ (ppc4xx)

The clock frequency of the MII bus

CONFIG_PHY_GIGE

If this option is set, support for speed/duplex
detection of gigabit PHY is included.

CONFIG_PHY_RESET_DELAY

Some PHY like Intel LXT971A need extra delay after
reset before any MII register access is possible.
For such PHY, set this option to the usec delay
required. (minimum 300usec for LXT971A)

CONFIG_PHY_CMD_DELAY (ppc4xx)

Some PHY like Intel LXT971A need extra delay after
command issued before MII status register can be read
Define a default value for the IP address to use for
the default Ethernet interface, in case this is not
determined through e.g. bootp.
(Environment variable "ipaddr")
Defines a default value for the IP address of a TFTP
server to contact when using the "tftboot" command.
(Environment variable "serverip")

CONFIG_KEEP_SERVERADDR

Keeps the server's MAC address, in the env 'serveraddr'
for passing to bootargs (like Linux's netconsole option)
Defines a default value for the IP address of the
default router where packets to other networks are
sent to.
(Environment variable "gatewayip")
Defines a default value for the subnet mask (or
routing prefix) which is used to determine if an IP
address belongs to the local subnet or needs to be
forwarded through a router.
(Environment variable "netmask")
Defines whether you want to support multicast TFTP as per
rfc-2090; for example to work with atftp.  Lets lots of targets
tftp down the same boot image concurrently.  Note: the Ethernet
driver in use must provide a function: mcast() to join/leave a
multicast group.
If you have many targets in a network that try to
boot using BOOTP, you may want to avoid that all
systems send out BOOTP requests at precisely the same
moment (which would happen for instance at recovery
from a power failure, when all systems will try to
boot, thus flooding the BOOTP server. Defining
CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
inserted before sending out BOOTP requests. The
following delays are inserted then:

1st BOOTP request:  delay 0 ... 1 sec
2nd BOOTP request:  delay 0 ... 2 sec
3rd BOOTP request:  delay 0 ... 4 sec
4th and following
BOOTP requests:     delay 0 ... 8 sec

CONFIG_BOOTP_ID_CACHE_SIZE

BOOTP packets are uniquely identified using a 32-bit ID. The
server will copy the ID from client requests to responses and
U-Boot will use this to determine if it is the destination of
an incoming response. Some servers will check that addresses
aren't in use before handing them out (usually using an ARP
ping) and therefore take up to a few hundred milliseconds to
respond. Network congestion may also influence the time it
takes for a response to make it back to the client. If that
time is too long, U-Boot will retransmit requests. In order
to allow earlier responses to still be accepted after these
retransmissions, U-Boot's BOOTP client keeps a small cache of
IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
cache. The default is to keep IDs for up to four outstanding
requests. Increasing this will allow U-Boot to accept offers
from a BOOTP client in networks with unusually high latency.
CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
CONFIG_BOOTP_VENDOREX
CONFIG_BOOTP_MAY_FAIL

CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
environment variable, not the BOOTP server.

CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
after the configured retry count, the call will fail
instead of starting over.  This can be used to fail over
to Link-local IP address configuration if the DHCP server
is not available.

CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
than one DNS serverip is offered to the client.
If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
is defined.

CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
of the "hostname" environment variable is passed as
option 12 to the DHCP server.

CONFIG_BOOTP_DHCP_REQUEST_DELAY

A 32bit value in microseconds for a delay between
receiving a "DHCP Offer" and sending the "DHCP Request".
This fixes a problem with certain DHCP servers that don't
respond 100% of the time to a "DHCP request". E.g. On an
AT91RM9200 processor running at 180MHz, this delay needed
to be *at least* 15,000 usec before a Windows Server 2003
DHCP server would reply 100% of the time. I recommend at
least 50,000 usec to be safe. The alternative is to hope
that one of the retries will be successful but note that
the DHCP timeout and retry process takes a longer than
this delay.
Several configurations allow to display the current
status using a LED. For instance, the LED will blink
fast while running U-Boot code, stop blinking as
soon as a reply to a BOOTP request was received, and
start blinking slow once the Linux kernel is running
(supported by a status LED driver in the Linux
kernel). Defining CONFIG_STATUS_LED enables this
feature in U-Boot.

Additional options:

CONFIG_GPIO_LED
The status LED can be connected to a GPIO pin.
In such cases, the gpio_led driver can be used as a
status LED backend implementation. Define CONFIG_GPIO_LED
to include the gpio_led driver in the U-Boot binary.

CONFIG_GPIO_LED_INVERTED_TABLE
Some GPIO connected LEDs may have inverted polarity in which
case the GPIO high value corresponds to LED off state and
GPIO low value corresponds to LED on state.
In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
with a list of GPIO LEDs that have inverted polarity.
Defining CONFIG_CAN_DRIVER enables CAN driver support
on those systems that support this (optional)
feature, like the TQM8xxL modules.
This enable the NEW i2c subsystem, and will allow you to use
i2c commands at the u-boot command line (as long as you set
CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
based realtime clock chips or other i2c devices. See
common/cmd_i2c.c for a description of the command line
interface.

ported i2c driver to the new framework:
- drivers/i2c/soft_i2c.c:
  - activate first bus with CONFIG_SYS_I2C_SOFT define
    CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
    for defining speed and slave address
  - activate second bus with I2C_SOFT_DECLARATIONS2 define
    CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
    for defining speed and slave address
  - activate third bus with I2C_SOFT_DECLARATIONS3 define
    CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
    for defining speed and slave address
  - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
    CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
    for defining speed and slave address

- drivers/i2c/fsl_i2c.c:
  - activate i2c driver with CONFIG_SYS_I2C_FSL
    define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
    offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
    CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
    bus.
  - If your board supports a second fsl i2c bus, define
    CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
    CONFIG_SYS_FSL_I2C2_SPEED for the speed and
    CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
    second bus.

- drivers/i2c/tegra_i2c.c:
  - activate this driver with CONFIG_SYS_I2C_TEGRA
  - This driver adds 4 i2c buses with a fix speed from
    100000 and the slave addr 0!

- drivers/i2c/ppc4xx_i2c.c
  - activate this driver with CONFIG_SYS_I2C_PPC4XX
  - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
  - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1

- drivers/i2c/i2c_mxc.c
  - activate this driver with CONFIG_SYS_I2C_MXC
  - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
  - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
  - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
  - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
  - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
  - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
If those defines are not set, default value is 100000
for speed, and 0 for slave.

- drivers/i2c/rcar_i2c.c:
  - activate this driver with CONFIG_SYS_I2C_RCAR
  - This driver adds 4 i2c buses

  - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
  - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
  - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
  - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
  - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
  - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
  - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
  - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
  - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses

- drivers/i2c/sh_i2c.c:
  - activate this driver with CONFIG_SYS_I2C_SH
  - This driver adds from 2 to 5 i2c buses

  - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
  - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
  - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
  - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
  - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
  - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
  - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
  - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
  - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
  - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
  - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses

- drivers/i2c/omap24xx_i2c.c
  - activate this driver with CONFIG_SYS_I2C_OMAP24XX
  - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
  - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
  - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
  - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
  - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
  - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
  - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
  - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
  - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
  - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4

- drivers/i2c/zynq_i2c.c
  - activate this driver with CONFIG_SYS_I2C_ZYNQ
  - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
  - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr

- drivers/i2c/s3c24x0_i2c.c:
  - activate this driver with CONFIG_SYS_I2C_S3C24X0
  - This driver adds i2c buses (11 for Exynos5250, Exynos5420
    9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
    with a fix speed from 100000 and the slave addr 0!

- drivers/i2c/ihs_i2c.c
  - activate this driver with CONFIG_SYS_I2C_IHS
  - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
  - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
  - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
  - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
  - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
  - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
  - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
  - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
  - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
  - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
  - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
  - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
  - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
  - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
  - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
  - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
  - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
  - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
  - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
  - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
  - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1

additional defines:

CONFIG_SYS_NUM_I2C_BUSES
Hold the number of i2c buses you want to use.

CONFIG_SYS_I2C_DIRECT_BUS
define this, if you don't use i2c muxes on your hardware.
if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
omit this define.

CONFIG_SYS_I2C_MAX_HOPS
define how many muxes are maximal consecutively connected
on one i2c bus. If you not use i2c muxes, omit this
define.

CONFIG_SYS_I2C_BUSES
hold a list of buses you want to use, only used if
CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
CONFIG_SYS_NUM_I2C_BUSES = 9:

 CONFIG_SYS_I2C_BUSES   {{0, {I2C_NULL_HOP}}, \
            {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
            {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
            {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
            {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
            {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
            {1, {I2C_NULL_HOP}}, \
            {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
            {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
            }

which defines
    bus 0 on adapter 0 without a mux
    bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
    bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
    bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
    bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
    bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
    bus 6 on adapter 1 without a mux
    bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
    bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2

If you do not have i2c muxes on your board, omit this define.
NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
provides the following compelling advantages:

- more than one i2c adapter is usable
- approved multibus support
- better i2c mux support

** Please consider updating your I2C driver now. **

These enable legacy I2C serial bus commands. Defining
CONFIG_HARD_I2C will include the appropriate I2C driver
for the selected CPU.

This will allow you to use i2c commands at the u-boot
command line (as long as you set CONFIG_CMD_I2C in
CONFIG_COMMANDS) and communicate with i2c based realtime
clock chips. See common/cmd_i2c.c for a description of the
command line interface.

CONFIG_HARD_I2C selects a hardware I2C controller.

There are several other quantities that must also be
defined when you define CONFIG_HARD_I2C.

In both cases you will need to define CONFIG_SYS_I2C_SPEED
to be the frequency (in Hz) at which you wish your i2c bus
to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
the CPU's i2c node address).

Now, the u-boot i2c code for the mpc8xx
(arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
and so its address should therefore be cleared to 0 (See,
eg, MPC823e User's Manual p.16-473). So, set
CONFIG_SYS_I2C_SLAVE to 0.

CONFIG_SYS_I2C_INIT_MPC5XXX

When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress.  Reset the slave devices by sending start
commands until the slave device responds.

That's all that's required for CONFIG_HARD_I2C.

If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
then the following macros need to be defined (examples are
from include/configs/lwmon.h):

I2C_INIT

(Optional). Any commands necessary to enable the I2C
controller or configure ports.

eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |=  PB_SCL)

I2C_PORT

(Only for MPC8260 CPU). The I/O port to use (the code
assumes both bits are on the same port). Valid values
are 0..3 for ports A..D.

I2C_ACTIVE

The code necessary to make the I2C data line active
(driven).  If the data line is open collector, this
define can be null.

eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |=  PB_SDA)

I2C_TRISTATE

The code necessary to make the I2C data line tri-stated
(inactive).  If the data line is open collector, this
define can be null.

eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)

I2C_READ

Code that returns true if the I2C data line is high,
false if it is low.

eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)

I2C_SDA(bit)

If <bit> is true, sets the I2C data line high. If it
is false, it clears it (low).

eg: #define I2C_SDA(bit) \
    if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
    else    immr->im_cpm.cp_pbdat &= ~PB_SDA

I2C_SCL(bit)

If <bit> is true, sets the I2C clock line high. If it
is false, it clears it (low).

eg: #define I2C_SCL(bit) \
    if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
    else    immr->im_cpm.cp_pbdat &= ~PB_SCL

I2C_DELAY

This delay is invoked four times per clock cycle so this
controls the rate of data transfer.  The data rate thus
is 1 / (I2C_DELAY * 4). Often defined to be something
like:

#define I2C_DELAY  udelay(2)

CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA

If your arch supports the generic GPIO framework (asm/gpio.h),
then you may alternatively define the two GPIOs that are to be
used as SCL / SDA.  Any of the previous I2C_xxx macros will
have GPIO-based defaults assigned to them as appropriate.

You should define these to the GPIO value as given directly to
the generic GPIO functions.

CONFIG_SYS_I2C_INIT_BOARD

When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress. On some boards it is possible to access
the i2c SCLK line directly, either by using the
processor pin as a GPIO or by having a second pin
connected to the bus. If this option is defined a
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.

CONFIG_SYS_I2C_BOARD_LATE_INIT

An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
defined a custom i2c_board_late_init() routine in
boards/xxx/board.c is run AFTER the operations in i2c_init()
is completed. This callpoint can be used to unreset i2c bus
using CPU i2c controller register accesses for CPUs whose i2c
controller provide such a method. It is called at the end of
i2c_init() to allow i2c_init operations to setup the i2c bus
controller on the CPU (e.g. setting bus speed & slave address).

CONFIG_I2CFAST (PPC405GP|PPC405EP only)

This option enables configuration of bi_iic_fast[] flags
in u-boot bd_info structure based on u-boot environment
variable "i2cfast". (see also i2cfast)

CONFIG_I2C_MULTI_BUS

This option allows the use of multiple I2C buses, each of which
must have a controller.  At any point in time, only one bus is
active.  To switch to a different bus, use the 'i2c dev' command.
Note that bus numbering is zero-based.

CONFIG_SYS_I2C_NOPROBES

This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued.  If CONFIG_I2C_MULTI_BUS
is set, specify a list of bus-device pairs.  Otherwise, specify
a 1D array of device addresses

e.g.
    #undef  CONFIG_I2C_MULTI_BUS
    #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}

will skip addresses 0x50 and 0x68 on a board with one I2C bus

    #define CONFIG_I2C_MULTI_BUS
    #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}

will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1

CONFIG_SYS_SPD_BUS_NUM

If defined, then this indicates the I2C bus number for DDR SPD.
If not defined, then U-Boot assumes that SPD is on I2C bus 0.

CONFIG_SYS_RTC_BUS_NUM

If defined, then this indicates the I2C bus number for the RTC.
If not defined, then U-Boot assumes that RTC is on I2C bus 0.

CONFIG_SYS_DTT_BUS_NUM

If defined, then this indicates the I2C bus number for the DTT.
If not defined, then U-Boot assumes that DTT is on I2C bus 0.

CONFIG_SYS_I2C_DTT_ADDR:

If defined, specifies the I2C address of the DTT device.
If not defined, then U-Boot uses predefined value for
specified DTT device.

CONFIG_SOFT_I2C_READ_REPEATED_START

defining this will force the i2c_read() function in
the soft_i2c driver to perform an I2C repeated start
between writing the address pointer and reading the
data.  If this define is omitted the default behaviour
of doing a stop-start sequence will be used.  Most I2C
devices can use either method, but some require one or
the other.
Enables SPI driver (so far only tested with
SPI EEPROM, also an instance works with Crystal A/D and
D/As on the SACSng board)

CONFIG_SH_SPI

Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.

CONFIG_SOFT_SPI

Enables a software (bit-bang) SPI driver rather than
using hardware support. This is a general purpose
driver that only requires three general I/O port pins
(two outputs, one input) to function. If this is
defined, the board configuration must define several
SPI configuration items (port pins to use, etc). For
an example, see include/configs/sacsng.h.

CONFIG_HARD_SPI

Enables a hardware SPI driver for general-purpose reads
and writes.  As with CONFIG_SOFT_SPI, the board configuration
must define a list of chip-select function pointers.
Currently supported on some MPC8xxx processors.  For an
example, see include/configs/mpc8349emds.h.

CONFIG_MXC_SPI

Enables the driver for the SPI controllers on i.MX and MXC
SoCs. Currently i.MX31/35/51 are supported.

CONFIG_SYS_SPI_MXC_WAIT
Timeout for waiting until spi transfer completed.
default: (CONFIG_SYS_HZ/100)     /* 10 ms */
Enables FPGA subsystem.

CONFIG_FPGA_<vendor>

Enables support for specific chip vendors.
(ALTERA, XILINX)

CONFIG_FPGA_<family>

Enables support for FPGA family.
(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)

CONFIG_FPGA_COUNT

Specify the number of FPGA devices to support.

CONFIG_CMD_FPGA_LOADMK

Enable support for fpga loadmk command

CONFIG_CMD_FPGA_LOADP

Enable support for fpga loadp command - load partial bitstream

CONFIG_CMD_FPGA_LOADBP

Enable support for fpga loadbp command - load partial bitstream
(Xilinx only)

CONFIG_SYS_FPGA_PROG_FEEDBACK

Enable printing of hash marks during FPGA configuration.

CONFIG_SYS_FPGA_CHECK_BUSY

Enable checks on FPGA configuration interface busy
status by the configuration function. This option
will require a board or device specific function to
be written.

CONFIG_FPGA_DELAY

If defined, a function that provides delays in the FPGA
configuration driver.

CONFIG_SYS_FPGA_CHECK_CTRLC
Allow Control-C to interrupt FPGA configuration

CONFIG_SYS_FPGA_CHECK_ERROR

Check for configuration errors during FPGA bitfile
loading. For example, abort during Virtex II
configuration if the INIT_B line goes low (which
indicated a CRC error).

CONFIG_SYS_FPGA_WAIT_INIT

Maximum time to wait for the INIT_B line to de-assert
after PROB_B has been de-asserted during a Virtex II
FPGA configuration sequence. The default time is 500
ms.

CONFIG_SYS_FPGA_WAIT_BUSY

Maximum time to wait for BUSY to de-assert during
Virtex II FPGA configuration. The default is 5 ms.

CONFIG_SYS_FPGA_WAIT_CONFIG

Time to wait after FPGA configuration. The default is
200 ms.
Some SoCs need special image types (e.g. U-Boot binary
with a special header) as build targets. By defining
CONFIG_BUILD_TARGET in the SoC / board header, this
special image will be automatically built upon calling
make / buildman.

CONFIG_IDENT_STRING

If defined, this string will be added to the U-Boot
version information (U_BOOT_VERSION)
U-Boot considers the values of the environment
variables "serial#" (Board Serial Number) and
"ethaddr" (Ethernet Address) to be parameters that
are set once by the board vendor / manufacturer, and
protects these variables from casual modification by
the user. Once set, these variables are read-only,
and write or delete attempts are rejected. You can
change this behaviour:

If CONFIG_ENV_OVERWRITE is #defined in your config
file, the write protection for vendor parameters is
completely disabled. Anybody can change or delete
these parameters.

Alternatively, if you define _both_ an ethaddr in the
default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Ethernet address is installed in the environment,
which can be changed exactly ONCE by the user. [The
serial# is unaffected by this, i. e. it remains
read-only.]

The same can be accomplished in a more flexible way
for any variable by configuring the type of access
to allow for those variables in the ".flags" variable
or define CONFIG_ENV_FLAGS_LIST_STATIC.
Define this variable to enable the reservation of
"protected RAM", i. e. RAM which is not overwritten
by U-Boot. Define CONFIG_PRAM to hold the number of
kB you want to reserve for pRAM. You can overwrite
this default value by defining an environment
variable "pram" to the number of kB you want to
reserve. Note that the board info structure will
still show the full amount of RAM. If pRAM is
reserved, a new environment variable "mem" will
automatically be defined to hold the amount of
remaining RAM in a form that can be passed as boot
argument to Linux, for instance like that:

    setenv bootargs ... mem=\${mem}
    saveenv

This way you can tell Linux not to use this memory,
either, which results in a memory region that will
not be affected by reboots.

*WARNING* If your board configuration uses automatic
detection of the RAM size, you must make sure that
this memory test is non-destructive. So far, the
following board configurations are known to be
"pRAM-clean":

    IVMS8, IVML24, SPD8xx, TQM8xxL,
    HERMES, IP860, RPXlite, LWMON,
    FLAGADM, TQM8260
Define this variable to stop the system in case of a
fatal error, so that you have to reset it manually.
This is probably NOT a good idea for an embedded
system where you want the system to reboot
automatically as fast as possible, but it may be
useful during development since you can try to debug
the conditions that lead to the situation.

CONFIG_NET_RETRY_COUNT

This variable defines the number of retries for
network operations like ARP, RARP, TFTP, or BOOTP
before giving up the operation. If not defined, a
default value of 5 is used.

CONFIG_ARP_TIMEOUT

Timeout waiting for an ARP reply in milliseconds.

CONFIG_NFS_TIMEOUT

Timeout in milliseconds used in NFS protocol.
If you encounter "ERROR: Cannot umount" in nfs command,
try longer timeout such as
#define CONFIG_NFS_TIMEOUT 10000UL
Enable auto completion of commands using TAB.

CONFIG_SYS_PROMPT_HUSH_PS2

This defines the secondary prompt string, which is
printed when the command interpreter needs more input
to complete a command. Usually "> ".
In the current implementation, the local variables
space and global environment variables space are
separated. Local variables are those you define by
simply typing `name=value'. To access a local
variable later on, you have write `$name' or
`${name}'; to execute the contents of a variable
directly type `$name' at the command prompt.

Global environment variables are those you use
setenv/printenv to work with. To run a command stored
in such a variable, you need to use the run command,
and you must not use the '$' sign to access them.

To store commands and special characters in a
variable, please use double quotation marks
surrounding the whole text of the variable, instead
of the backslashes before semicolons and special
symbols.
Enable editing and History functions for interactive
command line input operations
Enable support for changing the command prompt string
at run-time. Only static string is supported so far.
The string is obtained from environment variables PS1
and PS2.
Define this to contain any number of null terminated
strings (variable = value pairs) that will be part of
the default environment compiled into the boot image.

For example, place something like this in your
board's config file:

#define CONFIG_EXTRA_ENV_SETTINGS \
    "myvar1=value1\0" \
    "myvar2=value2\0"

Warning: This method is based on knowledge about the
internal format how the environment is stored by the
U-Boot code. This is NOT an official, exported
interface! Although it is unlikely that this format
will change soon, there is no guarantee either.
You better know what you are doing here.

Note: overly (ab)use of the default environment is
discouraged. Make sure to check other ways to preset
the environment like the "source" command or the
boot command first.

CONFIG_ENV_VARS_UBOOT_CONFIG

Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.

Enabling this option will cause the following to be defined:

- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC

CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

Define this in order to add variables describing certain
run-time determined information about the hardware to the
environment.  These will be named board_name, board_rev.

CONFIG_DELAY_ENVIRONMENT

Normally the environment is loaded when the board is
initialised so that it is available to U-Boot. This inhibits
that so that the environment is not available until
explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
this is instead controlled by the value of
/config/load-environment.
Traditionally U-Boot was run on systems with parallel NOR
flash. This option is used to disable support for parallel NOR
flash. This option should be defined if the board does not have
parallel flash.

If this option is not defined one of the generic flash drivers
(e.g.  CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be
selected or the board must provide an implementation of the
flash API (see include/flash.h).
Defining this option enables DataFlash features and
allows to read/write in Dataflash via the standard
commands cp, md...
Defining this option enables SPI flash commands
'sf probe/read/write/erase/update'.

Usage requires an initial 'probe' to define the serial
flash parameters, followed by read/write/erase/update
commands.

The following defaults may be provided by the platform
to handle the common case when only a single serial
flash is present on the system.

CONFIG_SF_DEFAULT_BUS       Bus identifier
CONFIG_SF_DEFAULT_CS        Chip-select
CONFIG_SF_DEFAULT_MODE      (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED     in Hz

CONFIG_CMD_SF_TEST

Define this option to include a destructive SPI flash
test ('sf test').

CONFIG_SF_DUAL_FLASH        Dual flash memories

Define this option to use dual flash support where two flash
memories can be connected with a given cs line.
Currently Xilinx Zynq qspi supports these type of connections.
Adding this option adds support for Xilinx SystemACE
chips attached via some sort of local bus. The address
of the chip must also be defined in the
CONFIG_SYS_SYSTEMACE_BASE macro. For example:

#define CONFIG_SYSTEMACE
#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000

When SystemACE support is added, the "ace" device type
becomes available to the fat commands, i.e. fatls.
If this is defined, the environment variable tftpsrcp
is used to supply the TFTP UDP source port value.
If tftpsrcp isn't defined, the normal pseudo-random port
number generator is used.

Also, the environment variable tftpdstp is used to supply
the TFTP UDP destination port value.  If tftpdstp isn't
defined, the normal port 69 is used.

The purpose for tftpsrcp is to allow a TFTP server to
blindly start the TFTP transfer using the pre-configured
target IP address and UDP port. This has the effect of
"punching through" the (Windows XP) firewall, allowing
the remainder of the TFTP transfer to proceed normally.
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
This enables a generic 'hash' command which can produce
hashes / digests from a few algorithms (e.g. SHA1, SHA256).

CONFIG_HASH_VERIFY

Enable the hash verify command (hash -v). This adds to code
size a little.

CONFIG_SHA1 - This option enables support of hashing using SHA1
algorithm. The hash is calculated in software.
CONFIG_SHA256 - This option enables support of hashing using
SHA256 algorithm. The hash is calculated in software.
CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration
for SHA1/SHA256 hashing.
This affects the 'hash' command and also the
hash_lookup_algo() function.
CONFIG_SHA_PROG_HW_ACCEL - This option enables
hardware-acceleration for SHA1/SHA256 progressive hashing.
Data can be streamed in a block at a time and the hashing
is performed in hardware.

Note: There is also a sha1sum command, which should perhaps
be deprecated in favour of 'hash sha1'.
CONFIG_CMD_BMODE
This enables the 'bmode' (bootmode) command for forcing
a boot from specific media.

This is useful for forcing the ROM's usb downloader to
activate upon a watchdog reset which is nice when iterating
on U-Boot.  Using the reset button or running bmode normal
will set it back to normal.  This command currently
supports i.MX53 and i.MX6.
This enables the bootcounter support, see:
http://www.denx.de/wiki/DULG/UBootBootCountLimit

CONFIG_AT91SAM9XE
enable special bootcounter support on at91sam9xe based boards.
CONFIG_BLACKFIN
enable special bootcounter support on blackfin based boards.
CONFIG_SOC_DA8XX
enable special bootcounter support on da850 based boards.
CONFIG_BOOTCOUNT_RAM
enable support for the bootcounter in RAM
CONFIG_BOOTCOUNT_I2C
enable support for the bootcounter on an i2c (like RTC) device.
    CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
    CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
                    the bootcounter.
    CONFIG_BOOTCOUNT_ALEN = address len
Defining this option allows to add some board-
specific code (calling a user-provided function
"show_boot_progress(int)") that enables you to show
the system's boot progress on some display (for
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
9   common/image.c      Start initial ramdisk verification
Default:
enabled if CONFIG_FIT_SIGNATURE is not defined.

CONFIG_DISABLE_IMAGE_LEGACY
disable the legacy image format

This define is introduced, as the legacy image format is
enabled per default for backward compatibility.
TODO(sjg@chromium.org): Adjust this option to be positive,
and move it to Kconfig
This option defines a board specific value for the
address where standalone program gets loaded, thus
overwriting the architecture dependent default
settings.
Define CONFIG_FB_ADDR if you want to use specific
address for frame buffer.  This is typically the case
when using a graphics controller has separate video
memory.  U-Boot will then place the frame buffer at
the given address instead of dynamically reserving it
in system RAM by calling lcd_setmem(), which grabs
the memory for the frame buffer depending on the
configured panel size.

Please see board_init_f function.
These options enable and control the auto-update feature;
for a more detailed description refer to doc/README.update.
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.

CONFIG_MTD_PARTITIONS

Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
Adds commands for interacting with MTD partitions formatted
with the UBI flash translation layer

Requires also defining CONFIG_RBTREE

CONFIG_UBI_SILENCE_MSG

Make the verbose messages from UBI stop printing.  This leaves
warnings and errors enabled.

CONFIG_MTD_UBI_WL_THRESHOLD
This parameter defines the maximum difference between the highest
erase counter value and the lowest erase counter value of eraseblocks
of UBI devices. When this threshold is exceeded, UBI starts performing
wear leveling by means of moving data from eraseblock with low erase
counter to eraseblocks with high erase counter.

The default value should be OK for SLC NAND flashes, NOR flashes and
other flashes which have eraseblock life-cycle 100000 or more.
However, in case of MLC NAND flashes which typically have eraseblock
life-cycle less than 10000, the threshold should be lessened (e.g.,
to 128 or 256, although it does not have to be power of 2).

default: 4096

CONFIG_MTD_UBI_BEB_LIMIT
This option specifies the maximum bad physical eraseblocks UBI
expects on the MTD device (per 1024 eraseblocks). If the
underlying flash does not admit of bad eraseblocks (e.g. NOR
flash), this value is ignored.

NAND datasheets often specify the minimum and maximum NVM
(Number of Valid Blocks) for the flashes' endurance lifetime.
The maximum expected bad eraseblocks per 1024 eraseblocks
then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
which gives 20 for most NANDs (MaxNVB is basically the total
count of eraseblocks on the chip).

To put it differently, if this value is 20, UBI will try to
reserve about 1.9% of physical eraseblocks for bad blocks
handling. And that will be 1.9% of eraseblocks on the entire
NAND chip, not just the MTD partition UBI attaches. This means
that if you have, say, a NAND flash chip admits maximum 40 bad
eraseblocks, and it is split on two MTD partitions of the same
size, UBI will reserve 40 eraseblocks when attaching a
partition.

default: 20

CONFIG_MTD_UBI_FASTMAP
Fastmap is a mechanism which allows attaching an UBI device
in nearly constant time. Instead of scanning the whole MTD device it
only has to locate a checkpoint (called fastmap) on the device.
The on-flash fastmap contains all information needed to attach
the device. Using fastmap makes only sense on large devices where
attaching by scanning takes long. UBI will not automatically install
a fastmap on old images, but you can set the UBI parameter
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
that fastmap-enabled images are still usable with UBI implementations
without fastmap support. On typical flash devices the whole fastmap
fits into one PEB. UBI will reserve PEBs to hold two fastmaps.

CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
Set this parameter to enable fastmap automatically on images
without a fastmap.
default: 0

CONFIG_MTD_UBI_FM_DEBUG
Enable UBI fastmap debug
default: 0
Adds commands for interacting with UBI volumes formatted as
UBIFS.  UBIFS is read-only in u-boot.

Requires UBI support as well as CONFIG_LZO

CONFIG_UBIFS_SILENCE_MSG

Make the verbose messages from UBIFS stop printing.  This leaves
warnings and errors enabled.
CONFIG_SPL_LDSCRIPT
LDSCRIPT for linking the SPL binary.

CONFIG_SPL_MAX_FOOTPRINT
Maximum size in memory allocated to the SPL, BSS included.
When defined, the linker checks that the actual memory
used by SPL from _start to __bss_end does not exceed it.
CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
must not be both defined at the same time.

CONFIG_SPL_MAX_SIZE
Maximum size of the SPL image (text, data, rodata, and
linker lists sections), BSS excluded.
When defined, the linker checks that the actual size does
not exceed it.

CONFIG_SPL_TEXT_BASE
TEXT_BASE for linking the SPL binary.

CONFIG_SPL_RELOC_TEXT_BASE
Address to relocate to.  If unspecified, this is equal to
CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).

CONFIG_SPL_BSS_START_ADDR
Link address for the BSS within the SPL binary.

CONFIG_SPL_BSS_MAX_SIZE
Maximum size in memory allocated to the SPL BSS.
When defined, the linker checks that the actual memory used
by SPL from __bss_start to __bss_end does not exceed it.
CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
must not be both defined at the same time.

CONFIG_SPL_STACK
Adress of the start of the stack SPL will use

CONFIG_SPL_PANIC_ON_RAW_IMAGE
When defined, SPL will panic() if the image it has
loaded does not have a signature.
Defining this is useful when code which loads images
in SPL cannot guarantee that absolutely all read errors
will be caught.
An example is the LPC32XX MLC NAND driver, which will
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.

CONFIG_SPL_ABORT_ON_RAW_IMAGE
When defined, SPL will proceed to another boot method
if the image it has loaded does not have a signature.

CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation.  If unspecified, this is equal to
CONFIG_SPL_STACK.

CONFIG_SYS_SPL_MALLOC_START
Starting address of the malloc pool used in SPL.
When this option is set the full malloc is used in SPL and
it is set up by spl_init() and before that, the simple malloc()
can be used if CONFIG_SYS_MALLOC_F is defined.

CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.

CONFIG_SPL_FRAMEWORK
Enable the SPL framework under common/.  This framework
supports MMC, NAND and YMODEM loading of U-Boot and NAND
NAND loading of the Linux Kernel.

CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon

CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.

CONFIG_SPL_INIT_MINIMAL
Arch init code should be built for a very small image

CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS,
Address and partition on the MMC to load U-Boot from
when the MMC is being used in raw mode.

CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
Partition on the MMC to load U-Boot from when the MMC is being
used in raw mode

CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
Sector to load kernel uImage from when MMC is being
used in raw mode (for Falcon mode)

CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
Sector and number of sectors to load kernel argument
parameters from when MMC is being used in raw mode
(for falcon mode)

CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
Partition on the MMC to load U-Boot from when the MMC is being
used in fs mode

CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
Filename to read to load U-Boot when reading from filesystem

CONFIG_SPL_FS_LOAD_KERNEL_NAME
Filename to read to load kernel uImage when reading
from filesystem (for Falcon mode)

CONFIG_SPL_FS_LOAD_ARGS_NAME
Filename to read to load kernel argument parameters
when reading from filesystem (for Falcon mode)

CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
Set this for NAND SPL on PPC mpc83xx targets, so that
start.S waits for the rest of the SPL to load before
continuing (the hardware starts execution after just
loading the first page rather than the full 4K).

CONFIG_SPL_SKIP_RELOCATE
Avoid SPL relocation

CONFIG_SPL_NAND_BASE
Include nand_base.c in the SPL.  Requires
CONFIG_SPL_NAND_DRIVERS.

CONFIG_SPL_NAND_DRIVERS
SPL uses normal NAND drivers, not minimal drivers.

CONFIG_SPL_NAND_ECC
Include standard software ECC in the SPL

CONFIG_SPL_NAND_SIMPLE
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.

CONFIG_SPL_UBI
Support for a lightweight UBI (fastmap) scanner and
loader

CONFIG_SPL_NAND_RAW_ONLY
Support to boot only raw u-boot.bin images. Use this only
if you need to save space.

CONFIG_SPL_COMMON_INIT_DDR
Set for common ddr init with serial presence detect in
SPL binary.

CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
CONFIG_SYS_NAND_ECCBYTES
Defines the size and behavior of the NAND that SPL uses
to read U-Boot

CONFIG_SPL_NAND_BOOT
Add support NAND boot

CONFIG_SYS_NAND_U_BOOT_OFFS
Location in NAND to read U-Boot from

CONFIG_SYS_NAND_U_BOOT_DST
Location in memory to load U-Boot to

CONFIG_SYS_NAND_U_BOOT_SIZE
Size of image to load

CONFIG_SYS_NAND_U_BOOT_START
Entry point in loaded image to jump to

CONFIG_SYS_NAND_HW_ECC_OOBFIRST
Define this if you need to first read the OOB and then the
data. This is used, for example, on davinci platforms.

CONFIG_SPL_OMAP3_ID_NAND
Support for an OMAP3-specific set of functions to return the
ID and MFR of the first attached NAND chip, if present.

CONFIG_SPL_RAM_DEVICE
Support for running image already present in ram, in SPL binary

CONFIG_SPL_PAD_TO
Image offset to which the SPL should be padded before appending
the SPL payload. By default, this is defined as
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.

CONFIG_SPL_TARGET
Final target image containing SPL and payload.  Some SPLs
use an arch-specific makefile fragment instead, for
example if more than one image needs to be produced.

CONFIG_FIT_SPL_PRINT
Printing information about a FIT image adds quite a bit of
code to SPL. So this is normally disabled in SPL. Use this
option to re-enable it. This will affect the output of the
bootm command when booting a FIT image.
CONFIG_TPL_PAD_TO
Image offset to which the TPL should be padded before appending
the TPL payload. By default, this is defined as
CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
There are common interrupt_init() and timer_interrupt()
for all PPC archs. interrupt_init() calls interrupt_init_cpu()
for CPU specific initialization. interrupt_init_cpu()
should set decrementer_count to appropriate value. If
CPU resets decrementer automatically after interrupt
(ppc4xx) it should set decrementer_count to zero.
timer_interrupt() calls timer_interrupt_cpu() for CPU
specific handling. If board has watchdog / status_led
/ other_activity_monitor it works automatically from
general timer_interrupt().
This option can be used as a workaround for the 440EPx/GRx
CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
be touched.

WARNING: Please make sure that this value is a multiple of
the Linux page size (normally 4k). If this is not the case,
then the end address of the Linux memory will be located at a
non page size aligned address and this could cause major
problems.
This feature allocates regions with increasing addresses
within the region. calloc() is supported, but realloc()
is not available. free() is supported but does nothing.
The memory will be freed (or in fact just forgotten) when
U-Boot relocates itself.
Non-cached memory is only supported on 32-bit ARM at present.
Enable TFTP transfers directly to flash memory;
without this option such a download has to be
performed in two steps: (1) download to RAM, and (2)
copy from RAM to flash.

The two-step approach is usually more reliable, since
you can check if the download worked before you erase
the flash, but in some situations (when system RAM is
too limited to allow for a temporary copy of the
downloaded image) this option may be very useful.
Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
      also needs to be defined.
Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
and RPXsuper) to be able to adjust the position of
the IMMR register after a reset.
CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
for cross-platform code that uses that macro instead.
#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
    * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
the default drive number (default value 0)

CONFIG_SYS_ISA_IO_STRIDE

defines the spacing between FDC chipset registers
(default value 1)

CONFIG_SYS_ISA_IO_OFFSET

defines the offset of register from address. It
depends on which part of the data bus is connected to
the FDC chipset. (default value 0)

If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
default value.

if CONFIG_SYS_FDC_HW_INIT is defined, then the function
fdc_hw_init() is called at the beginning of the FDC
setup. fdc_hw_init() must be provided by the board
source code. It is used to make hardware-dependent
initializations.
Start address of memory area that can be used for
initial data and stack; please note that this must be
writable memory that is working WITHOUT special
initialization, i. e. you CANNOT use normal RAM which
will become available only after programming the
memory controller and running certain initialization
sequences.

U-Boot uses the following memory types:
- MPC8xx and MPC8260: IMMR (internal memory of the CPU)
- MPC824X: data cache
- PPC4xx:  data cache
Offset of the initial data structure in the memory
area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
GENERATED_GBL_DATA_SIZE), and the initial stack is just
below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_GBL_DATA_OFFSET) downward.
cpm_8260.h.
means that the PHY with address 4 is connected to FEC1

When set to -1, means to probe for first available.
=> crc32 -v <address> <count> <crc32>

Where address/count indicate a memory area
and crc32 is the correct crc32 which the
area should have.
=> mdc.b 10 4 500
This command will print 4 bytes (10,11,12,13) each 500 ms.

=> mwc.l 100 12345678 10
This command will write 12345678 to address 100 all 10 ms.

This only takes effect if the memory commands are activated
globally (CONFIG_CMD_MEM).
Normally this variable MUST NOT be defined. The only
exception is when U-Boot is loaded (to RAM) by some
other boot loader or by a debugger which performs
these initializations itself.
NOTE : currently only supported on AM335x platforms.
$ CROSS_COMPILE=ppc_4xx-
$ export CROSS_COMPILE
   $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools

  Binaries such as tools/mkimage.exe will be created which can
  be executed on computers running Windows.
make NAME_defconfig
  make TQM823L_defconfig
- will configure for a plain TQM823L, i. e. no LCD support

  make TQM823L_LCD_defconfig
- will configure for a TQM823L with U-Boot console on LCD

  etc.
      If set to "no", a standalone image passed to the
      "bootm" command will be copied to the load address
      (and eventually uncompressed), but NOT be started.
      This can be used to load and uncompress arbitrary
      data.
      If this is set to the special value 0xFFFFFFFF then
      the fdt will not be copied at all on boot.  For this
      to work it must reside in writable memory, have
      sufficient padding on the end of it for u-boot to
      add the information it needs into it, and the memory
      must be accessible by the kernel.
      For instance, when you have a system with 16 MB
      RAM, and want to reserve 4 MB from use by Linux,
      you can do this by adding "mem=12M" to the value of
      the "bootargs" variable. However, now you must make
      sure that the initrd image is placed in the first
      12 MB as well - this can be done with

      setenv initrd_high 00c00000

      If you set initrd_high to 0xFFFFFFFF, this is an
      indication to U-Boot that all addresses are legal
      for the Linux kernel, including addresses in flash
      memory. In this case U-Boot will NOT COPY the
      ramdisk at all. This may be useful to reduce the
      boot time on your system, but requires that this
      feature is supported by your Linux kernel.
      => setenv ethact FEC
      => ping 192.168.0.1 # traffic sent on FEC
      => setenv ethact SCC
      => ping 10.0.0.1 # traffic sent on SCC
entry = variable_name[:callback_name]
list = entry[,list]
make TQM850L_defconfig
make oldconfig
make dep
make uImage
tools/mkimage -l image
  -l ==> list image header information
tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
          -n name -d data_file image
  -A ==> set architecture to 'arch'
  -O ==> set operating system to 'os'
  -T ==> set image type to 'type'
  -C ==> set compression type 'comp'
  -a ==> set load address to 'addr' (hex)
  -e ==> set entry point to 'ep' (hex)
  -n ==> set image name to 'name'
  -d ==> use image data from 'datafile'
-> tools/mkimage -n '2.4.4 kernel for TQM850L' \
> -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
> -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
> examples/uImage.TQM850L
Image Name:   2.4.4 kernel for TQM850L
Created:      Wed Jul 19 02:34:59 2000
Image Type:   PowerPC Linux Kernel Image (gzip compressed)
Data Size:    335725 Bytes = 327.86 kB = 0.32 MB
Load Address: 0x00000000
Entry Point:  0x00000000
-> tools/mkimage -l examples/uImage.TQM850L
Image Name:   2.4.4 kernel for TQM850L
Created:      Wed Jul 19 02:34:59 2000
Image Type:   PowerPC Linux Kernel Image (gzip compressed)
Data Size:    335725 Bytes = 327.86 kB = 0.32 MB
Load Address: 0x00000000
Entry Point:  0x00000000
-> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
-> tools/mkimage -n '2.4.4 kernel for TQM850L' \
> -A ppc -O linux -T kernel -C none -a 0 -e 0 \
> -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
> examples/uImage.TQM850L-uncompressed
Image Name:   2.4.4 kernel for TQM850L
Created:      Wed Jul 19 02:34:59 2000
Image Type:   PowerPC Linux Kernel Image (uncompressed)
Data Size:    792160 Bytes = 773.59 kB = 0.76 MB
Load Address: 0x00000000
Entry Point:  0x00000000
-> tools/mkimage -n 'Simple Ramdisk Image' \
> -A ppc -O linux -T ramdisk -C gzip \
> -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
Image Name:   Simple Ramdisk Image
Created:      Wed Jan 12 14:01:50 2000
Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
Data Size:    566530 Bytes = 553.25 kB = 0.54 MB
Load Address: 0x00000000
Entry Point:  0x00000000
tools/dumpimage -i image -T type -p position data_file
  -i ==> extract from the 'image' a specific 'data_file'
  -T ==> set image type to 'type'
  -p ==> 'position' (starting at 0) of the 'data_file' inside the 'image'
objcopy -I binary -O srec examples/image examples/image.srec
=> erase 40100000 401FFFFF

.......... done
Erased 8 sectors

=> loads 40100000
## Ready for S-Record download ...
~>examples/image.srec
1 2 3 4 5 6 7 8 9 10 11 12 13 ...
...
15989 15990 15991 15992
[file transfer complete]
[connected]
## Start Addr = 0x00000000
=> imi 40100000

## Checking Image at 40100000 ...
   Image Name:   2.2.13 for initrd on TQM850L
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    335725 Bytes = 327 kB = 0 MB
   Load Address: 00000000
   Entry Point:  0000000c
   Verifying Checksum ... OK
=> printenv bootargs
bootargs=root=/dev/ram

=> setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2

=> printenv bootargs
bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2

=> bootm 40020000
## Booting Linux kernel at 40020000 ...
   Image Name:   2.2.13 for NFS on TQM850L
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    381681 Bytes = 372 kB = 0 MB
   Load Address: 00000000
   Entry Point:  0000000c
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
time_init: decrementer frequency = 187500000/60
Calibrating delay loop... 49.77 BogoMIPS
Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
...
=> imi 40100000 40200000

## Checking Image at 40100000 ...
   Image Name:   2.2.13 for initrd on TQM850L
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    335725 Bytes = 327 kB = 0 MB
   Load Address: 00000000
   Entry Point:  0000000c
   Verifying Checksum ... OK

## Checking Image at 40200000 ...
   Image Name:   Simple Ramdisk Image
   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
   Data Size:    566530 Bytes = 553 kB = 0 MB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK

=> bootm 40100000 40200000
## Booting Linux kernel at 40100000 ...
   Image Name:   2.2.13 for initrd on TQM850L
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    335725 Bytes = 327 kB = 0 MB
   Load Address: 00000000
   Entry Point:  0000000c
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
## Loading RAMDisk Image at 40200000 ...
   Image Name:   Simple Ramdisk Image
   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
   Data Size:    566530 Bytes = 553 kB = 0 MB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
   Loading Ramdisk ... OK
Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
Boot arguments: root=/dev/ram
time_init: decrementer frequency = 187500000/60
Calibrating delay loop... 49.77 BogoMIPS
...
RAMDISK: Compressed image found at block 0
VFS: Mounted root (ext2 filesystem).

bash#
"Multi-File Images" start with a list of image sizes, each
image size (in bytes) specified by an "uint32_t" in network
byte order. This list is terminated by an "(uint32_t)0".
Immediately after the terminating 0 follow the images, one by
one, all aligned on "uint32_t" boundaries (size rounded up to
a multiple of 4 bytes).
=> loads
## Ready for S-Record download ...
~>examples/hello_world.srec
1 2 3 4 5 6 7 8 9 10 11 ...
[file transfer complete]
[connected]
## Start Addr = 0x00040004

=> go 40004 Hello World! This is a test.
## Starting application at 0x00040004 ...
Hello World
argc = 7
argv[0] = "40004"
argv[1] = "Hello"
argv[2] = "World!"
argv[3] = "This"
argv[4] = "is"
argv[5] = "a"
argv[6] = "test."
argv[7] = "<NULL>"
Hit any key to exit ...

## Application terminated, rc = 0x0
? - print current values og the CPM Timer registers
b - enable interrupts and start timer
e - stop timer and disable interrupts
q - quit application

=> loads
## Ready for S-Record download ...
~>examples/timer.srec
1 2 3 4 5 6 7 8 9 10 11 ...
[file transfer complete]
[connected]
## Start Addr = 0x00040004

=> go 40004
## Starting application at 0x00040004 ...
TIMERS=0xfff00980
Using timer 1
  tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
   Name    Program          Name U/D FullScr IO-Red. Multi
X  kermit  /usr/bin/kermit -i -l %l -s   Y    U    Y       N      N
Y  kermit  /usr/bin/kermit -i -l %l -r   N    D    Y       N      N
# cd /usr/pkg/cross/powerpc-netbsd/include
# mkdir powerpc
# ln -s powerpc machine
# cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
# ${EDIT} powerpc/ansi.h    ## must remove __va_list, _BSD_VA_LIST
Chris Hallinan posted a good summary of these issues to the
U-Boot mailing list:

Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
From: "Chris Hallinan" <clh@net1plus.com>
Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
...

Correct me if I'm wrong, folks, but the way I understand it
is this: Using DCACHE as initial RAM for Stack, etc, does not
require any physical RAM backing up the cache. The cleverness
is that the cache is being used as a temporary supply of
necessary storage before the SDRAM controller is setup. It's
beyond the scope of this list to explain the details, but you
can see how this works by studying the cache architecture and
operation in the architecture and processor-specific manuals.

OCM is On Chip Memory, which I believe the 405GP has 4K. It
is another option for the system designer to use as an
initial stack/RAM area prior to SDRAM being available. Either
option should work for you. Using CS 4 should be fine if your
board designers haven't used it for something that would
cause you grief during the initial boot! It is frequently not
used.

CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
with your processor/board/system design. The default value
you will find in any recent u-boot distribution in
walnut.h should work for you. I'd set it to a value larger
than your SDRAM module. If you have a 64MB SDRAM module, set
it above 400_0000. Just make sure your board has no resources
that are supposed to respond to that address! That code in
start.S has been around a while and should work as is when
you get the config right.

-Chris Hallinan
DS4.COM, Inc.
(U-Boot also uses R12 as internal GOT pointer. r12
is a volatile register so r12 needs to be reset when
going back and forth between asm and C)

==> U-Boot will use R2 to hold a pointer to the global data

Note: on PPC, we could use a static initializer (since the
address of the global data structure is known at compile time),
but it turned out that reserving a register results in somewhat
smaller code - although the code savings are not that big (on
average for all boards 752 bytes for the whole U-Boot image,
624 text + 127 data).
==> U-Boot will use P3 to hold a pointer to the global data
R0: function argument word/integer result
R1-R3:  function argument word
R9: platform specific
R10:    stack limit (used only if stack checking is enabled)
R11:    argument (frame) pointer
R12:    temporary workspace
R13:    stack pointer
R14:    link register
R15:    program counter

==> U-Boot will use R9 to hold a pointer to the global data

Note: on ARM, only R_ARM_RELATIVE relocations are supported.
==> U-Boot will use gp to hold a pointer to the global data

Note: on Nios II, we give "-G0" option to gcc and don't use gp
to access small data sections, so gp is free.
R0-R1:  argument/return
R2-R5:  argument
R15:    temporary register for assembler
R16:    trampoline register
R28:    frame pointer (FP)
R29:    global pointer (GP)
R30:    link register (LP)
R31:    stack pointer (SP)
PC: program counter (PC)

==> U-Boot will use R10 to hold a pointer to the global data
0x0000 0000 Exception Vector code
      :
0x0000 1FFF
0x0000 2000 Free for Application Use
      :
      :

      :
      :
0x00FB FF20 Monitor Stack (Growing downward)
0x00FB FFAC Board Info Data and permanent copy of global data
0x00FC 0000 Malloc Arena
      :
0x00FD FFFF
0x00FE 0000 RAM Copy of Monitor Code
...     eventually: LCD or video framebuffer
...     eventually: pRAM (Protected RAM - unchanged by reset)
0x00FF FFFF [End of RAM]
signal(SIGALRM, no_more_time);
alarm(PROJECT_DEADLINE - toSec (3 * WEEK));

if (available_money > available_manpower) {
    Pay consultant to port U-Boot;
    return 0;
}

Download latest U-Boot source;

Subscribe to u-boot mailing list;

if (clueless)
    email("Hi, I am new to U-Boot, how do I get started?");

while (learning) {
    Read the README file in the top level directory;
    Read http://www.denx.de/twiki/bin/view/DULG/Manual;
    Read applicable doc/*.README;
    Read the source, Luke;
    /* find . -name "*.[chS]" | xargs grep -i <keyword> */
}

if (available_money > toLocalCurrency ($2500))
    Buy a BDI3000;
else
    Add a lot of aggravation and time;

if (a similar board exists) {   /* hopefully... */
    cp -a board/<similar> board/<myboard>
    cp include/configs/<similar>.h include/configs/<myboard>.h
} else {
    Create your own board support subdirectory;
    Create your own board include/configs/<myboard>.h file;
}
Edit new board/<myboard> files
Edit new include/configs/<myboard>.h

while (!accepted) {
    while (!running) {
        do {
            Add / modify source code;
        } until (compiles);
        Debug;
        if (clueless)
            email("Hi, I am having problems...");
    }
    Send patch file to the U-Boot email list;
    if (reasonable critiques)
        Incorporate improvements from email list code review;
    else
        Defend code as written;
}

return 0;

tq-systems / u-boot-tqmaxx

readme

(C) Copyright 2000 - 2013

Wolfgang Denk, DENX Software Engineering, wd@denx.de.

SPDX-License-Identifier: GPL-2.0+

Summary:

Status:

Where to get help:

Where to get source code:

Where we come from:

Names and Spelling:

Versioning:

Directory Hierarchy:

Software Configuration:

Selection of Processor Architecture and Board Type:

Sandbox Environment:

Board Initialisation Flow:

Configuration Options:

modprobe usbserial vendor=0xVendorID product=0xProductID

Board initialization settings:

Configuration Settings:

define CONFIG_I2C_ENV_EEPROM_BUS 1

Low Level (hardware related) configuration options:

define'd default value in commproc.h resp.

define CONFIG_FEC1_PHY 4

Freescale QE/FMAN Firmware Support:

Freescale Layerscape Management Complex Firmware Support:

Freescale Layerscape Debug Server Support:

Reproducible builds

Building the Software:

Testing of U-Boot Modifications, Ports to New Hardware, etc.:

Monitor Commands - Overview:

Monitor Commands - Detailed Description:

Environment Variables:

Callback functions for environment variables:

Command Line Parsing:

Old, simple command line parser:

Hush shell:

General rules:

Note for Redundant Ethernet Interfaces:

Image Formats:

New uImage format (FIT)

Old uImage format

Linux Support:

Linux HOWTO:

Porting Linux to U-Boot based systems:

Configuring the Linux kernel:

Building a Linux Image:

Installing a Linux Image:

Boot Linux:

Boot Linux and pass a flat device tree:

Booting image at 00200000 ...

More About U-Boot Image Types:

Booting the Linux zImage:

Standalone HOWTO:

"Hello World" Demo:

Minicom warning:

NetBSD Notes:

Implementation Internals:

Initial Stack, Global Data:

Memory Management:

System Initialization:

U-Boot Porting Guide:

Coding Standards:

Submitting Patches: