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trillek-team
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trillek-computer
Trillek Virtual Computer specs
http://trillek-team.github.io/trillek-computer/
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Stack operations in the cheetsheet are different from the main documentation
#43
Meisaka
opened
3 years ago
0
Virtual Keybard too GLFW dependent
#42
Zardoz89
closed
9 years ago
11
word and byte overflow and carry bits
#41
Zardoz89
opened
9 years ago
15
Instructions should be able to be executed conditionally in an efficient and intuitive manner.
#40
Zardoz89
opened
9 years ago
30
IF* instructions have a reliability/security downside
#39
Zardoz89
opened
9 years ago
3
Sign-extending load for byte and word data
#38
Zardoz89
opened
9 years ago
5
Auto increment register TR3200
#37
UplinkCoder
opened
9 years ago
6
TDA Hardware cursor
#36
Zardoz89
closed
9 years ago
0
Single Step mode must have the lowest priority
#35
Zardoz89
closed
9 years ago
1
Tweaked Branch instructions
#34
Zardoz89
closed
9 years ago
3
Provide a 64 bit division instruction
#33
catageek
closed
9 years ago
4
TR3200: Comparison is broken
#32
milesrout
closed
9 years ago
9
TR3200: Register names
#31
milesrout
closed
9 years ago
5
TR3200 : NOPIF instruction
#30
Zardoz89
closed
9 years ago
5
Simplify conditional branch detection by moving them in [0x60-0x6F] range
#29
catageek
closed
9 years ago
2
Add a SKIP instruction with opcode 0xFF
#28
catageek
closed
9 years ago
5
Add exceptions to the CPU and align LOAD/STORE/PUSH/POP
#27
Zardoz89
opened
9 years ago
13
Fixed weak encoding requirements for operandless instructions
#26
milesrout
closed
9 years ago
1
P3 instruction from 0xC0 to 0xFF with embedded immediate Rn should be undefined
#25
catageek
closed
9 years ago
2
Use semantic versioning
#24
milesrout
closed
9 years ago
5
Optimization: Move L bit at position 31 and reduce operation code to 7bits
#23
catageek
closed
9 years ago
7
Fix LSB position of Rn, Rs and Rd for all instructions
#22
catageek
closed
9 years ago
11
TR3200 : Alternate way of detect immediate following instruction and instruction align
#21
catageek
closed
9 years ago
13
TR3200 : Enforce align of 8 byte instructions (long literal instructions)
#20
Zardoz89
closed
9 years ago
8
Drop DCPU16N and change some names&details on devices
#19
Zardoz89
closed
9 years ago
5
Spelling/Phrasing
#18
tredontho
closed
10 years ago
1
Added VCD file format
#17
Acruid
closed
10 years ago
1
Rewrite floppy
#16
Zardoz89
closed
10 years ago
0
Made up some device sub-types
#15
Meisaka
closed
10 years ago
0
Update DCPU-16N.md
#14
Zardoz89
closed
10 years ago
0
DCPU-16N markdown version (0.8) - gh-pages
#13
Zardoz89
closed
10 years ago
0
DCPU-16N markdown version (0.8)
#12
Meisaka
closed
10 years ago
2
Adding Serial Multiplex Device
#11
paultech
closed
10 years ago
1
To nice pages
#10
Zardoz89
closed
10 years ago
0
Added embedded device specs for RNG and RTC.
#9
Acruid
closed
10 years ago
0
Improve tr3200
#8
Acruid
closed
10 years ago
2
Minor changes, tweaks
#7
Zardoz89
closed
9 years ago
2
PIT memory mapping is off
#6
ghost
closed
10 years ago
2
PIT memory mapping is off
#5
ghost
closed
10 years ago
0
Grammar, wording, and number of registers
#4
ghost
closed
10 years ago
2
Fixed number of registers
#3
ghost
closed
10 years ago
0
Assembler
#2
Zardoz89
closed
9 years ago
4
Support for Memory mapping/Paging
#1
mr1337357
closed
9 years ago
3