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tum-ei-eda / M2-ISA-R

CoreDSL2 Parser with backend to generate simulation code for the ETISS instruction set simulator
https://tum-ei-eda.github.io/M2-ISA-R/
Apache License 2.0
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Overflow dropping in summation operation #10

Open togulcan opened 2 years ago

togulcan commented 2 years ago

I realized in the below operation wrong return value Z is generated during the summation of X and Y:

unsigned<64> foo(unsigned<32> X, unsigned<32> Y){
    unsigned<64> Z = X + Y;
    return Z;
}

I believe this is due to the fact that X and Y are translating to C types (etiss_uint32) and their summation also returns etiss_uint32 which drops the overflow value(32nd bit).

However when I do casting explicitly as follows:

unsigned<64> foo(unsigned<32> X, unsigned<32> Y){
    unsigned<64> Z = (unsigned<64>)X + (unsigned<64>)Y;
    return Z;
}

It works pretty well.

But coredsl2 manual guarantees no dropping is occurring by simply setting the width of the result value to wr = max(w1 + 1, w2 + 1). Should not M2-ISA-R also guarantee this? This is leading to a lot of unexpected behaviors.

Thanks a lot!

neithernut commented 2 years ago

AFAIU this is a bug.

wysiwyng commented 2 years ago

This is indeed an oversight in the implementation of at least the ETISS code generator. CoreDSL type promotion rules are more or less ignored completely in M2-ISA-R as of now, therefore standard C type promotion rules are used in ETISS. I will look into this, but it will probably take a moment to properly fix.