tum-ei-eda / M2-ISA-R

CoreDSL2 Parser with backend to generate simulation code for the ETISS instruction set simulator
https://tum-ei-eda.github.io/M2-ISA-R/
Apache License 2.0
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PC access in functions does not yield correct results #16

Open wysiwyng opened 2 years ago

wysiwyng commented 2 years ago
void pctest(int a, int b) {
  X[a] = PC;
  PC = X[b];
}

is translated to:

static inline void pctest(ETISS_CPU * const cpu, ETISS_System * const system, void * const * const plugin_pointers, etiss_int32 a, etiss_int32 b)
{
  ((test_core*)cpu)->X[a] = ic.current_address_;
  cpu->instructionPointer = ((test_core*)cpu)->X[b];
}

where ic.current_address_ can not be accessed in function context.

neithernut commented 2 years ago

Could you please elaborate?

wysiwyng commented 2 years ago

the PC can be read as ic.current_address_ during the instruction translation phase of ETISS, as functions are executed during JIT runtime they need to read the PC as cpu->instructionPointer

wysiwyng commented 2 years ago

problematic in "just doing that" is that currently cpu->instructionPointer is incremented at the very beginning of each instruction, but ic.current_address_ always points to the address of the current instruction. to fix this properly, the PC increment would have to be reworked, and by that extent most likely made explicit in the CoreDSL model.

wysiwyng commented 2 years ago

see also: https://github.com/Minres/CoreDSL/issues/54