ut-issl / c2a-core

Satellite Flight Software: Command-Centric Architecture
MIT License
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c2a

Core of Command Centric Architecture

C2A

C2A core

ドキュメント

開発

セットアップ

  1. clone 後, setup.bat or setup.sh を実行

Kanban (開発マイルストーンなど)

SILS (Software-In-the-Loop-Simulation) 環境

テスト

ブランチ

採用実績・動作実績

C2A Core の採用実績のある衛星 OBC や動作実績のあるボードの情報をまとめる.

Name Satellite    Lead Institution    Launch / Deploy CPU    Clock              ROM                     RAM                   NVRAM                 Storage                   Interface           Reference
OBC (2U) MAGNARO (Tigris) Inamori Lab. at Nagoya University 2022/10/12 STMicroelectronics STM32F4 90 MHz 2 MiB internal ROM 384 KiB internal RAM, 500 KiB external SRAM 524 KiB MRAM, 131 KiB EEPROM 16 GB SD card UART, SPI, I2C, GPIO, ADC, DCMI [^1]
OBC (1U) MAGNARO (Piscis) Inamori Lab. at Nagoya University 2022/10/12 STMicroelectronics STM32F4 45 MHz 2 MiB internal ROM 384 KiB internal RAM, 500 KiB external SRAM 524 KiB MRAM, 131 KiB EEPROM 16 GB SD card UART, SPI, I2C, GPIO, ADC, DCMI [^1]
MOBC SPHERE-1 EYE Sony Group Corporation, ISSL at the University of Tokyo 2023/01/03 Renesas Electronics SH-2A 200 MHz 2.5 MiB internal ROM 128 KiB internal RAM, 8 MiB external SRAM 2 MiB MRAM 2 GiB NAND flash memory UART (RS422, LVTTL), CCSDS (LVTTL), GPIO (LVTTL), ADC
AOBC SPHERE-1 EYE Sony Group Corporation, ISSL at the University of Tokyo 2023/01/03 Microchip Technology PIC32MX7 80 MHz 512 KiB internal ROM 128 KiB internal RAM 512 KiB FRAM None UART (RS422, RS485, LVTTL), SPI, I2C, GPIO (LVTTL), ADC
TOBC SPHERE-1 EYE Sony Group Corporation, ISSL at the University of Tokyo 2023/01/03 Microchip Technology PIC32MX7 30 MHz 512 KiB internal ROM 128 KiB internal RAM None None UART (LVTTL), I2C, GPIO (LVTTL), ADC
AOBC OPTIMAL-1 ArkEdge Space Inc. 2023/01/06
MOBC ONGLAISAT ISSL at the University of Tokyo - Renesas Electronics SH-2A 200 MHz 2.5 MiB internal ROM 128 KiB internal RAM, 8 MiB external SRAM 2 MiB MRAM 2 GiB NAND flash memory UART (RS422, LVTTL), CCSDS (LVTTL), GPIO (LVTTL), ADC [^1]
AOBC ONGLAISAT ISSL at the University of Tokyo - Microchip Technology PIC32MX7 80 MHz 512 KiB internal ROM 128 KiB internal RAM 512 KiB FRAM None UART (RS422, RS485, LVTTL), SPI, I2C, GPIO (LVTTL), ADC [^1]
TOBC ONGLAISAT ISSL at the University of Tokyo - Microchip Technology PIC32MX7 30 MHz 512 KiB internal ROM 128 KiB internal RAM None None UART (LVTTL), I2C, GPIO (LVTTL), ADC [^1]

[^1]: Ryo Suzumoto, et al. Improvement of C2A (Command-Centric Architecture) Reusability for Multiple Types of OBCs and Development of Continuous Integration Environment for Reliability of Flight Software. 33rd International Symposium on Space Technology and Science, 2022-f-58, 2022.

関連リンク

C2A 関連ツール

User 実装例

関連 crate

協力

ArkEdge Space Inc.

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