Add reinit and reinit_value ports to the br_counter_* variants.

xlsynth / bedrock-rtl

High quality and composable base RTL libraries in Verilog

Apache License 2.0

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Closed rahulnagarajan-openai closed 22 hours ago

rahulnagarajan-openai commented 3 days ago

Currently we are using rst to init the values to MAX or MIN values. I would like the following changes

Add a reinit port to allow us to reinitialize the values to MAX or MIN value post reset
Add a reinit_val (which user can tie to MAX/MIN or a user specified value) to reinitialize the counter to when reinit is set.

mgottscho commented 2 days ago

Will do this today.