Vivado and RMII

[wfjm]

There are quite a few Ethernet MAC cores, but mostly in Verilog. I've a project written in VHDL, use GHDL, and therefore looked for a core written in VHDL, and found this project. The core was tested with a Spartan-6, thus with legacy ISE and uses the MII interface. One possible application would be with a Digilent Arty board (with Artix-7). Another application would be a different Artix-7 board with a LAN8720 based PHY attached via a Pmod. Such a Pmod, e.g. from Waveshare, offers an RMII interface.

Two questions:

• was this core ever tested with Vivado ?
• it it possible to adapt it for an RMII interface ?

[mbaykenar]

There is MII to RMII IP freely available from AMD/XILINX. You can find this IP Vivado versions 2019.1 and below. Newer versions do not have. You can install Vivado 2019.1 and copy IP files to newer Vivado projects.