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### Description
I've used following command for GF180 PDK installation:
```
export PDK_FAMILY=gf180mcu
export PDK=gf180mcuC
cd OpenLane && make
```
Its has successfully installed GF180 pdk an…
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## Expected Behavior
The page @ https://gf180mcu-pdk.readthedocs.io/en/latest/digital/standard_cells/standard_cells.html should list the standard cell libraries.
## Actual Behavior
The standa…
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## Expected Behavior
Should be: in absence of klayout cmd-line args: -rd feol=true, or case-variant the FEOL section does not run. Same for BEOL.
## Actual Behavior
FEOL, BEOL sections always run, …
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## Expected Behavior
`sram512x8m8wm1` DRC clean
## Actual Behavior
`sram512x8m8wm1` has a violation in rule `NW.2b_5V_`
## Steps to Reproduce the Problem
1. build the pdk
2. run `python3 r…
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## Expected Behavior
No duplicates rules executed when run separate processes, each for just: beol, feol, offgrid, on same GDS. Want those 3 to "cover" all the rules, but without significant overlaps…
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## Expected Behavior
No errors
## Actual Behavior
Prints an nonfatal error:
```
ERROR: ../../../src/db/db/dbRegionLocalOperations.cc,839,nstart > 0
ERROR: Worker thread: Internal error: ../../…
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Recently, GSoC 2023 was announced. It would be great if a project for Icarus Verilog could be submitted.
I already talked in [#746](https://github.com/steveicarus/iverilog/issues/746#issuecomment-1…
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I need a straightforward mapping of layer names to GDS types/subtypes. I believe this information is captured by various tool configuration files, like `gf180mcu.lyp` for klayout, but it would be help…
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## Expected Behavior
`simple_por` DRC clean
## Actual Behavior
`simple_por` has a violation in rule `LPW.2a_5V_`
## Steps to Reproduce the Problem
1. build the pdk
2. run `python3 run_drc.…
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## Expected Behavior
Do not corrupt connectivity (leading to false or dropped errors) by using layers that are not part of the fab process.
Do not read/merge/count data from such superfluous layers.…