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Hi, Please I am new to hardware and vivado and I don't know how to find the files which are required for creating a Vivado project for the SIMTight project. Please what do i need to create the Vivado …
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Hello, here we are facing a weird problem.
What we have done:
- Created an .onnx model file,
- Created an IP with no warnings.
- Ran the C simulation and RTL simulation, every test passed.
Wha…
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Hi, I have an PYNQ image v2.4 and have cloned this repo, but cant run the 3thed step:
I get this error but when I go there I can see the file and its executable, do I need to set a path or how do I…
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## Versions
- PYNQ Z1: v3.0.1
- FINN: v0.9
- Xilinx tools: 2022.2
- Ununtu: 20.04
## Commit hash
commit e76f20d1d8d05f2d8ddb52ade0f991915672622b (HEAD -> dev, origin/dev)
Merge: a3b6a7fb 3…
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Hello, I've been studying what you've posted and I'm a student just starting to learn about the FPGA. When I follow the steps in the README, I encountered a problem with the I/O in the picture, if you…
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In section 6.1 Launch the install_rosai_file_input.sh script to install and build the application. In step 3 this is what I'm experiencing.
setp3.
cd /home/ubuntu/KR260-Robotics-AI-Challenge/files/s…
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I've just tried to use the frequency planner by following instructions on:
https://github.com/strath-sdr/rfsoc_frequency_planner
But, when I ran the 'pip3 install' command, I got the following log…
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ARTIFACTS (.v) files not being generated after running after invoking the command- "rtl -a /demo/arch/pynqz1.tarch -s true" the RTL Summary is generated but not the .v files
OS- Windows 10
Errors:…
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Hi, I'm a student interested in FPGA and want to learn more about SDR, especially AD936X based ones. I wonder if it's possible to have AD936X extension boards for low-cost FPGA platforms like the PYNQ…
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## Prerequisites
Please make sure to check off these prerequisites before submitting a bug report.
- [√] Test that the bug appears on the current version of the dev-branch. Make sure to include the …