-
VersionCheck in validate_instruction.cpp checks minimum version for a SPIR-V opcode. But it ignores min-version constraints on operands.
For example, when assembled with --target-env spv1.0, the f…
-
Hi,
new ISPC 1.14 supports now Intel GPUs..
see:
https://ispc.github.io/ispc_for_gen.html
(ispc foo.ispc --target=genx-x8 -o foo.spv)
It generates SPIR-V files using new Intel SPIR-V extensions w…
-
Support for these has been added to wgpu. Release 0.20.0 supports them on metal, vulkan and dx12 (i think), release 22.0.0 supports them, at least in some fashion, on the web.
At least in my curren…
-
Would you like to give me any information how to convert from MLIR to SPIR-V?
I tried to use mlir-translate with serialize-spirv option, but I couldn't realize how to use this option.
-
Quoting myself from https://github.com/gfx-rs/wgpu/issues/4558:
> I do not understand why `break if` turns into that kind of conditional `break`.
>
> AIUI it was only added to WGSL to represent S…
eddyb updated
3 months ago
-
**Is your feature request related to a problem? Please describe.**
https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/SPIR-V.rst#signature-packing
looks cool and all but I'd also li…
-
**Which proposal does this relate to?**
#61 - Wave Matrix
**Describe the issue or outstanding question.**
The proposal describes WaveMatrixLeft and WaveMatrixRight as being parameterized using M an…
-
# Current overview
This is intended to be a tracking issue for adding support for data tiling on GPU backends. "Data tiling" here is being used to describe strategies for reorganizing the layout of…
-
The detailed FP semantics of SPIR-V ops is often decoupled from the op specification. For example, [`OpGroupNonUniForm "FMin"`](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpGroupNon…
kuhar updated
5 months ago
-
I may be on a slightly old and internally modified version of the spir-v reader, but I think nothing has changed in the area I'm looking at here.
The attached spir-v gets one element of a variable …