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```
make -j -C /home/khiem/Desktop/Litex/build/sim/gateware/obj_dir -f Vsim.mk Vsim
make[1]: Entering directory '/home/khiem/Desktop/Litex/build/sim/gateware/obj_dir'
g++ -I. -MMD -I/home/khiem/o…
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Hi !
I want to implement RTOS in my SoC built with LiteX. I want to use FreeRTOS on the CVA6 CPU. But, I don't see how to link FreeRTOS to my SoC `csr.h` file.
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Hi! I've gotten simulation to work fine, trying to test on my ulx3s and the vgmplay.bin upload fails at around 17% (the rainbow color-cycling stops and the LEDs change to green, none of the buttons se…
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bios_options is a list in https://github.com/enjoy-digital/litex/blob/ddcac462c3420f01a4f415c1d6bd7e1001b8227d/litex/soc/integration/builder.py#L81 but used as a dictionary in https://github.com/timvi…
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Thoughts?
@mgielda / @tcal-x
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last step of this section:
https://github.com/timvideos/litex-buildenv/wiki/Bash-On-Windows#install-litex
```
juser@DESKTOP-KOJ4LVF:~/lhub/litex-buildenv$ source ./scripts/enter-env.sh
Please …
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I got an message saing "litex_sim: command not found" when I typed in litex_sim --cpu -type=vexriscv.
Do you have ideas or experience on that? All the previous steps are done successfully.
Appreciat…
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Running Fedora 36 - when running the install instructions listed I am unable to get Litex to install, it has a conflict finding the Migen:
`AssertionError: Egg-link ./pyhdl/migen does not match insta…
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Currently the LiteX cores have only a synchronous reset network; this is due to the nature of LiteX as having been developed for FPGA targets, where it is assumed that all registers map to hardware t…