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Since the long term goal of seashell is to demonstrate its superiority over current HLS implementations, we will need to port and test existing HLS benchmarks (even make our own?).
@sampsyo has sug…
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In this https://github.com/Xilinx/Vitis_Accel_Examples/tree/master/sys_opt/slr_assign
after generating binary, I just verified binary with vitis_analyser. Both the kernels assigned in bank1.
`Expe…
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I found a few issues while running commands using make
1)make build is not working
2)make all reports error for HOST_ARCH= aarch64
fatal error: CL/cl2.hpp: No such file or directory
#includ…
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Building the hbm_bandwidth example, either as is, with 8 CU, or with only 2 CU, seems to fail to meet timing on the Alveo U280 accelerator card using SDAccel 2019.1. The log file is provided below. Pe…
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Tracking in PR#41
allwu updated
4 years ago
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Python unit test test_tuple_type crashes in my platform, but it is passing in the CI.
Log:
```
tests/python/unittest/test_ir_type.py::test_tuple_type Fatal Python error: Segmentation fault
Cur…
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Hi, I was trying to use the library with Vivado HLS 2019.2 and it's surprising that I probably cannot run `cosim_design` independent of `cynth_design` from my tcl scipt.
So every time I am calling…
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When I tried to build tvm with `USE_SDACCEL=ON` , I found it failed with the following error.
```shell
➜ cmake --build .
[20/116] Building CXX object CMakeFiles/tvm.dir/src/runtime/opencl/sdacce…
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This issue is a followup to the #4819, After applying the #4820 changes, Under windows, trying to run the example : [Auto-tuning a convolutional network for x86 CPU](https://docs.tvm.ai/tutorials/auto…
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For the past few days, I've been trying to compile the OpenCL kernels that Futhark emits with Xilinx's SDAccel compiler. The main problem I'm encountering so far is the lack of support for atomic oper…