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hi all:
i got an error when i try to build vp, following is the error information:
"/lib/libnvdla_cmod.so: undefined reference to `sc_core::sc_vector_base::make_name(char const*, unsigned long)'
"/…
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Parameter access should be thread safe. For example, we need to consider how tools interact with parameters (is it only when the simulation is not running?).
Ballpark effort estimate: 1/2 week.
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Hello,
I'm new with nvdla. I was able to build and run a simulation with Vivado with nvdlav1 branch and nv_full configuration. I was able also to run it on Riviera-PRO simulator as well.
However, …
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Hi,
When I followed the process you mentioned in README, I ended up with below eeor? Any clue why?
Here is the error:
simctx = gdb.lookup_symbol("sc_core::sc_curr_simcontext")[0].value().dere…
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# Description
I'm trying to run behavioral simulation for ZHW on fccm-ae branch using target test_z3_behav.
```
make test_z3_behav
ERROR: [Vivado 12-172] File or Directory '/home3/shared/liu91/sys…
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This is probably not PySysC specific issue but my cppyy installation. I followed the procedure to build PySysC and I get this error when cppyy is imported (when I run any of the python files in tests…
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/home/nicolast0604/vp/hw/outdir/nv_full/cmod/release/lib/libnvdla_cmod.so: undefined reference to `sc_core::sc_vector_base::make_name(char const*, unsigned long)'
collect2: error: ld returned 1 exit …
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When I'm building verif_protection in master branch, the follow several errors occurs in run_trace_player.sh and run_test.py. How can I get the nvdla.fsdb?
1. after stack trace appears when running…
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I am trying to do step 4 under 'Writing Your Own Wrapper of Ramulator 2.0 for my own Simulator' in readme file, to send the memory requests from my simulator to Ramulator 2.0.
Inside frontend.h file…
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Hello Tianzhu,
Thanks for your great work on making SystemC simulation easy.
While following the instructions, I got the following error during simulation.
s.monitor('top.CLOCK')
Traceback (mo…