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I just built nextpnr-ecp5 with GUI and prjtrellis on Windows and there were some obstacles I came across.
I could document them if interest is there. Any pointers on where and how are welcome.
The…
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The current [FPGA interchange XDC parser](https://github.com/litghost/nextpnr/blob/murax_debug/fpga_interchange/xdc.cc) doesn't support the set of features required. Many of the XDC commands implemen…
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I am attempting to generate a YAML-equivalent version of an Interchange device file. I am following the example shown on the main [README.md ](https://github.com/SymbiFlow/python-fpga-interchange/blo…
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I have an ice40 design with a cpu running at 50MHz and an sdram controller running at 100MHz. The clocks are generated from the same PLL using GENCLK and GENCLK_HALF parameters and global buffers, so…
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In the process of testing a very basic LiteX design, I stumbled upon an issue for which, if a cell is given the name equal to the corresponding cell_type, than the cell would not be present in the phy…
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> NOTE: when using Vivado, the issue is not present!
When using openXC7 (place and route step) we get an error in **OSERDESE2** module, **slave_oserdese** to be specific, where it says OQ and OFB p…
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Hi there,
Thanks for putting this project together; it's great :)
I've successfully programmed a BX with the sample echo device, and verified that it works nicely.
I'd like to get some advice o…
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Hi @forflo,
The fact that yodl is licensed under GPLv3 makes it impossible to incorporate it into yosys (which is licensed under ISC).
Are you aware of this?
How do you think about relicensing …
stv0g updated
4 years ago
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Presently can't seem to configure `arachne-pnr` or `yosys` to take in the shown `.sdc` file. With `man arachne-pnr` and `man yosys`, the former has the `-p` flag to take in the `.pcf` file, and while …
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The syntax of the `.comment` statement expected by IceStorm does not appear to match the syntax output by `arachne-pnr`.
`icepack` expects comments to be in the following syntax:
.comment
…