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I kindly ask you to update fpga for sp605 because kc705 I am still trying to modify Thank you very much otherwise there is no way I can continue working on this work Thank you very much for your proje…
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As far as I can see, you do not provide any list of compatible device and that makes it very hard to know what is acceptable in the command line tool for the `--device-name` field
If I'm completely…
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**Description**
GHDL crashes when building Vivado's 2022.1 `unisim` library, specifically when compiling `unisims/primitive/ISERDES_NODELAY.vhd`. This is a regression since older versions worked fine…
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**Describe the bug**
Run WSL. Run medley in WSL. Your monitors will no longer go to sleep after the screensaver timeout set in the host..
**Expected behavior**
Monitors should sleep even though…
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard)
- [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues)
- [X] Y…
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Hi!
I'm writing some bazel build/test rules for vunit which in turn depends on JSON-for-vhdl.
My rules only concern GHDL at the moment, but any file/repo vunit depends on will be part of the set o…
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**Describe the bug**
Whilst #4030 has fixed this issue in many cases, it seems we still dump the path from the store when building a recursive mode fixed output derivation.
**Steps To Reproduce*…
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Hi Frisk ,
I have tried FPGA enablement & unable to make it work USB3 ftdi ft601-b device with FPGA SP605 .
== > (https://github.com/ufrisk/pcileech-fpga/tree/master/sp605_ft601)
**for build** …
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Hello,
I'm having an issue or misunderstanding for communicating with the processor via UART. I downloaded the bitstream v8.0 into the ML605 board using iSE Impact, opened the UART channel on my co…
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## Issue Description ##
Ran through the x410 (x400) setup recently, and there were a couple things that I felt could be added to the documentation to help devs get through the process.
O…