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PDK_ROOT/sky130A/libs.tech/openlane does not have the corresponding sub folder with the openlane setup files of sky130_fd_sc_lp
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Examples;
* https://foss-eda-tools.googlesource.com/third_party/shuttle/sky130/mpw-002/slot-001/+/refs/heads/main/info.yaml
* https://foss-eda-tools.googlesource.com/third_party/shuttle/sky130/mpw…
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We are facing several issues with the device models. We have summarized some of them in the following repo:
https://github.com/mabrains/sky130_analog_testcases/tree/master PFET Vth is incorrect mos…
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I want to do gate level simulation with sky130_fd_sc_hd.v and primitives.v without using power nets. However iverilog can't compile sky130_fd_sc_hd.vwithout power nets because of some cells syntax err…
ghost updated
2 years ago
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## Expected Behavior
Line 16 should read
`* include "sky130_fd_pr__esd_nfet_05v0_nvt.pm3"`
## Actual Behavior
Line 16 now is:
`include "sky130_fd_pr__esd_nfet_05v0_nvt.pm3"`
Because of leadi…
holvo updated
10 months ago
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We need a decent Python library which makes it trivial to open the `.mdm` files found in these repositories. Will be useful for plotting the data with things like matplotlib and exploring with other P…
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I tried to run make on open_pdk but I am getting several errors.
I made sure I have all prerequisites according to the instructions on open_pdks webpage.
Here is my sky130A_make.log file to show…
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I needed to simulate the gate level netlist for DFFRAM, but I found that no combination of defines results in functional results with icarus verilog and sky130_fd_sc_hd.v as installed by Open_PDK. De…
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HI,
As per my previous publications, we need to make separate drivers for forming the device (~3v) and program device(~1v)
Can u explain if you have made separate drivers for these?
I could not fi…
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> You may get the entire [FreePDK45 PDK here](https://www.eda.ncsu.edu/wiki/FreePDK45:Contents).
It would be good to have this link fixed.