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https://coldnew.github.io/f4865ec/
Ultra96 開發紀錄: 開箱文 一文中筆者紀錄了如何購買 Ultra96 開發板，在這邊文章中我們則是來看看 Ultra96 rev1 的版本，到底有哪些硬體與週邊。 Ultra96 有分 v1 與 v2 兩個版本， 本文使用的是 Ultra96v1 的硬體 ，不過請注意 Ultra96v1 已經被宣告 EOL …
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Dear Sir,
I am trying the notebook for yolov4-tiny on ultra96 and stuck at
tcu = Driver(ultra96, overlay.axi_dma_0)
I have to stop the notebook and found the following traces:
/home/xilinx/tc…
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Is is possible to improve initial installation paragraph ?
https://github.com/viveris/LoCod?tab=readme-ov-file#install
locod script is referencing docker images included in the submodule but there…
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Hello,
I've built a custom platform for the Ultra96 board as it is shown in the CHaiDNN documentation.
After that, I build the SW and put everything on the SD.
When I try to run GoogLeNet, I …
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hi
Why is there no script for compiling the Zybo bitstream in Vivado? I'm aware that it's possible to dynamically configure the FPGA's bin file (https://github.com/ikwzm/FPGA-SoC-Linux-Example-1-ZYBO…
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Hi,
i tested it with an Ultra96-V2 and used the rootfs image.
After boot there is no Ubuntu desktop just a blank black screen.
I will attach the dmesg. Any hint's whats wrong?
Maybe the packed…
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I'm new to ESP and heterogeneous SoC design as well. I'm very interested in using ESP for our research project.
But we don't have any supported boards now.
We would like to use ESP for the Ultra96…
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Hi,
I am trying to build the latest u96v2 platform for Vitis 2022.1 to run the latest Vitis-AI 2.5.
I cloned the repositories and started building the hardware, then when compiling petalinux, the …
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Without limiting the thread count, Vivado consumes a lot of memory. We should make sure that our option works so that we can reduce memory footprint for students using the Ultra96.
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Hi,
I tried your Ubuntu image, with a QT application I build but the performance are quite bad in respect of what I get with petalinux and wayland (using the Avnet bsp)
When qt application starts it…