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Hi,
I noticed that there is not an explicit `LICENSE` file in the repo, only the mention of the ISC license in the README.
As far as I know, you need the `LICENSE` file in the root of the reposi…
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* [Sybmbiflow](https://symbiflow.readthedocs.io/en/latest/introduction.html) for bitstream synthesis (uses Yosys internally)
* Project Trellis is for Lattice ECP5 FPGAs.
List of RISCV cores/projec…
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### Description
Getting following error :
Error: or_opendp.tcl, 29 can't read "::env(PL_DIAMOND_SEARCH_HEIGHT)": no such variable
In README.MD file it says this switch has been removed. But it …
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iceprog toplevel.bin in Murax of VexRiscv (gateware)
iceprog firmware.bin in picorv32
can do them both?
burn the gateware then firmware
then I can add instruction in Murax and modify riscv gcc com…
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Naiive question: is it possible that the following assembler code (excluding the variable declaration) needs 256 cycles, every further iteration (++us) are additional 197 cycles?
```
unsigned int …
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Hi when i am trying to Run make test or any make commands its produce the following error picorv32.v:1878: error: invalid module item.
picorv32.v:1879: syntax error
picorv32.v:1879: error: Invalid…
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I am having some problem understanding the following snippet in `picosoc`:
https://github.com/cliffordwolf/picorv32/blob/e308982e18fc952a8d446ddb7ea8b70433a998c2/picosoc/hx8kdemo.v#L57-L65
I hav…
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The iCE40UP5K has DSP tiles which are described as "DSP blocks with multiply and accumulate functions". They are 16 x 16 Multiply & 32 bit Accumulator Blocks which can be chained together to be a 32x3…
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Tried to run GCC C compiled code on SERV RISC V.
Seems the addi opcode behaviour is wrong.
assembly code like:
addi sp,sp,-64
or
deadc1b7 lui gp,0xdeadc
eef18193 …
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Hello. I'm a newbie on this subject.
I was trying to test PicoRV32 core and taking this error message :
`/opt/riscv32i/bin/riscv32-unknown-elf-gcc -c -march=rv32imc -o firmware/start.o firmware/s…