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Mu custom RTL in the system created using the SDAccel RTL Kernel Wizard 2017.1 works correctly in the hardware emulation mode. But when I run on the AWS F1 instance, the program hangs up as soon as th…
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I am currently running Yolo demo on the FPGA AMI.
I have followed the steps mentioned in the ml-suit setup for FPGA AMI.
git clone https://github.com/aws/aws-fpga.git
cd aws-fpga
so…
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Error running the following command: make check TARGETS=hw_emu DEVICES=$AWS_PLATFORM all.
How can I fix it? Any ideas?
Thanks.
****** vpl v2017.4 (64-bit)
**** SW Build 2193837 on Tue Ap…
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I use the Xilinx ML Suite AMI, and I am trying to run the same demo app with the same command "./run.sh aws e2e" in [this issue](https://github.com/Xilinx/ml-suite/issues/20), I also do the `source sd…
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Xilinx tools (SDAccel, SDSoC, HLS...) provide extensions to express pipelining, dataflow, partitionning,
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug1023-sdaccel-user-guid…
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In the Ireland region, after starting a c4.4xlarge with the ami `FPGA Developer AMI - 1.4.0 - pre8-40257ab5-6688-4c95-97d1-e251a40fd1fc-ami-0335b86e84e820e8d.4 (ami-c6be8bbf)`, when running `sdaccel_s…
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Testing this code I tried to feed the generated SDAccel_Kernel.tar file into the app and it generates an error
>> ./xil_gzip -i Developer_SDAccel_Kernel.tar
result:
ERROR: Failed to sync 652124…
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In section [4: Running the SDAccel 'Hello World' example on AWS F1](https://github.com/Xilinx/SDAccel_Examples/wiki/Create,-configure-and-test-an-AWS-F1-instance#4-running-the-sdaccel-hello-world-exam…
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After running the hardware emulation of the Xilinx example helloworld_ocl with $AWS_PLARTFORM_4DDR_DEBUG, it would generates the profile reports. While after running in the FPGA, there's no reports g…
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https://github.com/Xilinx/SDAccel_Examples/wiki/Run-your-first-SDAccel-program-on-AWS-F1
“$ SDACCEL_DIR/tools/create_sdaccel_afi.sh \” should be
"$ $SDACCEL_DIR/tools/create_sdaccel_afi.sh \".