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aws-fpga
Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
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Encounter error when using dcp to create AFI image
#655
zackyen53614
opened
1 month ago
1
用dcp去create AFI image遇到error
#654
zackyen53614
closed
3 weeks ago
0
Support for newer version of Vivado...
#653
wpiman
opened
2 months ago
0
How to issue a PCIe FLR to CL
#652
ns-intusurg
opened
2 months ago
8
HLX flow FIFO IP generator version conflict
#651
cholan2100
opened
2 months ago
2
Loading of simulation waveform in Vivado is too slow
#650
Gogul-N
opened
3 months ago
2
Simulation - File Dump to a memory
#649
Gogul-N
closed
3 months ago
1
ETA on new dev AMI?
#648
ljp0101
opened
3 months ago
1
fail in get_f1_ami_id()
#647
huchensong
opened
3 months ago
3
Does AWS F1 support Vitis AI 2.5?
#646
zain2323
opened
4 months ago
0
phys_opt_design error during implementation
#645
Gogul-N
closed
3 months ago
3
Connect MicroBlaze Debug Module (MDM) to Virtual JTAG in Vivado IP Integrator
#644
s03311251
opened
5 months ago
3
FPGA cloud-based
#643
raghady2001
opened
6 months ago
1
Instance status checks failures
#642
ljp0101
opened
6 months ago
14
Debug embedded microblaze using XVC JTAG in AWS FPGA shell
#641
augierg
opened
6 months ago
12
Accessing the AXI-Lite via the fpga_pci_attach call...
#640
wpiman
opened
7 months ago
2
DRAM page mode
#638
ehudeliaz
opened
8 months ago
1
Files missing from AMI
#637
jerhill
opened
8 months ago
2
Does aws have u200?
#636
deepakkumar2440
closed
4 months ago
3
Linux Kernel 6 support for xdma
#635
Fischiii
closed
9 months ago
4
fpga_mgmt_load_local_image_sync() failures
#634
ljp0101
closed
8 months ago
12
peer xclbin download err: -11
#633
ioeddk
opened
10 months ago
2
PCIM ARID all bits can be used?
#632
tewujianke
opened
10 months ago
1
Name port does not exist for instance f1_inst
#631
kevinkiener
closed
8 months ago
6
Update
#630
Hotwright
opened
1 year ago
12
Inserting ILA is improving the performance
#629
Gogul-N
closed
1 year ago
4
[XRT] ERROR: failed to load xclbin: Invalid argument / xocl_read_axlf_helper: interface uuids do not match
#628
BogdanSorlea
closed
8 months ago
4
DMA read is not correct
#627
Gogul-N
closed
1 year ago
1
Clock routing error [Place 30-838]
#626
ljp0101
closed
8 months ago
4
Time delay in filling up BRAM using DMA
#625
Gogul-N
closed
1 year ago
3
PCIM AXI W Channel hangs with wReady stuck at 0
#624
tewujianke
closed
10 months ago
2
DDR performance drop with specific address access pattern
#623
indragade
closed
8 months ago
4
Using ARM processor in f1 FPGA instance
#622
Gogul-N
closed
8 months ago
16
Placement issues faced as Vivado Tool is not using complete pBlock for Custom Logic Design
#621
Gogul-N
closed
1 year ago
5
ERROR: [Place 30-678] Failed to do clock region partitioning
#620
Gogul-N
closed
1 year ago
8
AWS XVC new update
#619
jimmy-adams
closed
1 year ago
4
vitis_setup.sh with non-root permissions
#618
linux-guy-217
opened
1 year ago
5
Reading Interrupt Signal from the shell
#617
Gogul-N
closed
1 year ago
2
Partial configuration error on SH_DEBUG_BRIDGE
#616
ehudeliaz
opened
1 year ago
14
Cannot simulate with the branch small_shell
#615
vsoBen
closed
1 year ago
2
[Question]: Xilinx library elaboration error with VCS simulation
#614
sajjadahmed677
closed
1 year ago
2
[Question]: Is it possible to instantiate my own DDR IP or I must use SH_DDR?
#613
ehudeliaz
closed
1 year ago
2
FAQ update on scrubbing scenario
#612
kyyalama2
closed
1 year ago
0
fpga_dma_open_queue() failure
#611
ljp0101
closed
1 year ago
3
[Question]: Post-Route DRC in SHELL clock nets.
#610
sajjadahmed677
closed
1 year ago
10
Can an AFI support on the fly partial reconfiguration through providing AWS multiple DCPs or a partially reconfigurable DCP?
#609
hgrove
closed
1 year ago
4
Question: Availability zones and instance availability factor
#608
ljp0101
closed
1 year ago
2
Difficulty creating fpga image using HDK getting started guide (INACCESSIBLE_INPUT: Error accessing resource in S3)
#607
hubregtsen
closed
1 year ago
2
XDMA no longer builds in Ubuntu AMI
#606
rsnikhil
closed
1 year ago
10
[Question]: Multi beat burst transactions between two FPGAs
#605
sajjadahmed677
closed
1 year ago
3
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