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Hi,
I have an issue with one of the tutorials that may be related to the code.
When following the ProbeRe-router tutorial in the jupyter notebook, invoking `ProbeRouter.updateProbeConnections(de…
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I'm trying to use plockplace to create a LUT without specifying the location
`
EDIFCell or2Cell = netlist.getHDIPrimitive(Unisim.OR2);
EDIFCellInst or2Inst = top.createCellInst("or2In…
hpan5 updated
4 years ago
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Hi,
I am using UBUNTU 18.04.
I want to use jupyter for using RapidWright, but I cannot run these instructions?
what should I do?
(base) user@parsapc1000:~$ java com.xilinx.rapidwright.util.Rap…
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when I am running command rapid_compile_ipi I am getting a message that no .igf file available. Execution stops with showing messages below. Please help me with this issue
Exception in thread "mai…
dsp20 updated
5 years ago
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Site.getIntTile() produces ArrayIndexOutOfBoundsException in line 4 with this Python code
[xc7a35t_getIntTile.py](https://github.com/Xilinx/RapidWright/files/3073249/xc7a35t_getIntTile.py.txt)
I e…
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The following code produces a NullPointerException on getConnectedCells(). Design dcp/edf attached:
[top_routed.zip](https://github.com/Xilinx/RapidWright/files/3311691/top_routed.zip)
```
…
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(v2018.3)
I'm trying to use SitePinInst.getConnectedCells() on the following design:
[top_routed.zip](https://github.com/Xilinx/RapidWright/files/3311811/top_routed.zip)
The code below prints t…
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Currently the source code is located in /com, and the gradle.build file indicates this through the statement:
```
sourceSets {
main {
java {
srcDirs = ['com']
}
}
```
Howe…
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If you click on a VCC or GND node in Vivado, a "Tied value" item appears in the property pane thus:
![Screenshot from 2019-05-29 16-35-27](https://user-images.githubusercontent.com/5521177/58570422-e…
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How do you suggest adding support for using Yosys for Synthesis and Vivado for place and route to the https://github.com/m-labs/nmigen/blob/master/nmigen/vendor/xilinx_7series.py file?
I'm wonderin…