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I'm not sure if this is a `nextpnr` specific issue (eg, bitstream generation), or a hardware limitation. But since there *are* parameters which seem to be intended to map between ICE40 RGB driver cha…
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Hi mates,
I am working on a FPGA project involving generating an internal clock using only a Ring Oscillator (the same as used by Clifford Wolf in his pressure-sensing project [here](http://svn.cliff…
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Does Project IceStorm toolchain (yosys, arachne-pnr, IceStorm Tools) have some type of standard output format for getting reports about things like;
* Messages like info, warnings & errors (for al…
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When trying to route a design using LUT instantiation, I get this error:
```
route...
libc++abi.dylib: terminating with uncaught exception of type std::out_of_range: map::at: key not found
```
…
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https://github.com/tinyfpga/TinyFPGA-BX.git
examples/picofpga
```
arachne-pnr -d 8k -P cm81 -o hardware.asc -p hardware.pcf hardware.blif
seed: 1
device: 8k
read_chipdb +/share/arachne-pnr/c…
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# Create a Python library for parsing / producing BLIF (and eBLIF) files
BLIF is the preferred method of design entry for many designers. The Berkeley Logic Interchange Format (BLIF) is a simple fi…
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Running arachne on counter.v from tutorial 4 (the 26 bit counter) results in a fatal error due to missing set_io constraints. The counter.v file contains:
`module counter(input clk, output [25:0] d…
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icetime can't parse new pcf options such as `-nowarn`, `-pullup`, and `-pullup-resistor`. It fails with the message:
```
// Reading input .pcf file..
icetime: icetime.cc:230: void read_pcf(const …
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I'm trying to get this toolchain (minus vivado) running on Mac OS 10.14.6, and have run into a few problems; some may be Mac related, and perhaps that's unsupported, but some seem more general.
Fol…