f4pga ideas issues - Githubissues

f4pga / ideas

Random ideas and interesting ideas for things we hope to eventually do.

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issues

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Deterministic/reproducible builds

#67 walling opened 2 years ago
2
Using Edalize to drive f4pga

#66 olofk opened 2 years ago
1
Gsoc 2022 fix link

#65 jszwedyk closed 2 years ago
0
Openfasoc gsoc projects

#64 msaligane closed 2 years ago
1
Openfasoc GSOC project

#63 msaligane closed 2 years ago
3
move to chipalliance org and include ASIC projects?

#62 proppy opened 2 years ago
0
Review first two ideas + some more fixes

#61 mgielda closed 2 years ago
0
Formal Verification

#60 andrewb1999 opened 3 years ago
2
Add SymbiFlow tooling to openSUSE

#59 mark-stopka opened 3 years ago
2
Community issue / bounty tracker

#58 bluecmd opened 4 years ago
1
HPC and OpenCL around SymbiFlow stack

#57 manili opened 4 years ago
3
SymbiFlow projects documentation audit

#56 kgugala opened 4 years ago
1
Create a series of user stories documents

#55 kgugala opened 4 years ago
0
SymbiFlow ecosystem map

#54 acomodi opened 4 years ago
0
Add Contributing Guide to SymbiFlow projects

#53 kgugala opened 4 years ago
0
Open FPGA for absolute beginners

#52 acomodi opened 4 years ago
6
Create a "common configuration" git repository which is auto-merged into SymbiFlow projects

#51 mithro opened 4 years ago
8
Add an .editorconfig file to all SymbiFlow repositories

#50 mithro opened 4 years ago
4
Create a symbiflow-sphinx-docs-common repository

#49 mithro opened 4 years ago
11
RFC: Creating a synthesis or PnR benchmark

#48 TheProgrammerIncarnate opened 4 years ago
3
Updated the repositories to comply with the current copyright best practices

#47 mithro opened 4 years ago
4
Add common ASIC/FPGA file formats to GitHub/linguist

#46 mithro opened 4 years ago
0
improve WaveDrom

#45 drom opened 4 years ago
0
SystemVerilog parser using Tree-Sitter

#44 drom opened 4 years ago
0
Streaming VCD parser

#43 drom opened 4 years ago
0
Render LUT diagram

#42 drom opened 4 years ago
1
RTL Schematic View

#41 drom opened 4 years ago
42
Improve the visual representation of the placement done by VTR

#40 tmichalak opened 4 years ago
0
Support for cheapest FPGAs on the market

#39 Harvie opened 4 years ago
11
Support Xilinx XC9500XL CPLD series

#38 spth opened 4 years ago
1
Setup an Open Collective

#37 XVilka opened 5 years ago
0
Improve FASM documentation to boost adoption of the standard

#36 mgielda opened 5 years ago
0
Getting started with Debian Linux on RISC-V with SymbiFlow tutorial

#35 mgielda opened 5 years ago
8
Getting started with Buildroot Linux on RISC-V with SymbiFlow tutorial

#34 mgielda opened 5 years ago
1
Getting started with embedded RISC-V tutorial

#33 mgielda opened 5 years ago
2
Figure out automated testing of Sphinx code snippets in SymbiFlow tutorials

#32 mgielda closed 5 years ago
3
Get PicoSoC supported in upstream Zephyr RTOS

#31 mgielda opened 5 years ago
0
Get Murax supported in upstream Zephyr RTOS

#30 mgielda opened 5 years ago
0
Get LiteX/minerva supported in upstream Zephyr RTOS

#29 mgielda opened 5 years ago
0
Get LiteX/VexRiscv supported in upstream Zephyr and update RISC-V Getting Started Guide

#28 mgielda closed 5 years ago
2
Standardize formatting across all repos

#27 elms opened 5 years ago
0
Standardize or translate between different database formats

#26 elms opened 5 years ago
0
Testing on hardware

#25 elms opened 5 years ago
5
Join the forces with The OpenROAD project

#24 XVilka closed 5 years ago
1
Create a Python library for generating VtR arch.xml files

#23 mithro opened 5 years ago
3
Participate in Google Summer of Code

#22 XVilka closed 5 years ago
8
Verilog IDE based on Qt Creator integrated with SymbiFlow

#21 rochus-keller closed 5 years ago
3
Verilog AST format

#20 drom opened 5 years ago
8
Lowlevel LLVM-like language as HDL middle layer

#19 XVilka opened 6 years ago
105
Create Python library for parsing / producing BLIF (and eBLIF) files

#18 mithro opened 6 years ago
7