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Could you please tell me which version of Vivado you are using? Thank you very much
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As title, I know SYCL implementation defines `half` data type in `cl::sycl` space, my question is bfloat16 is whether supported like `cl::sycl::bfloat16` ?
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As far as I know, when compiling, I should use the compile.pl script.
I noticed that in the last line of the file, there is a command: "*_system "sdaccel alphadata_host.tcl" *_". But I did not instal…
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## Personal Details
**Name:** Asma Ansari
**Undergrad or MEng?** Undergraduate
**Year in Cornell:** Rising senior (Class of 2025)
**Relevant classes:** CS 2110, ECE 2300, ECE 3140, ECE 475…
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Hi @noelpedro
I noticed you worked on this project for a while (have seen your questions in the GNSS-SDR repo). Unfortunately, the GNSS-SDR authors did not share the RTL implementation of the HW ac…
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# The issue tracker is not a support forum
The LinuxCNC issue tracker is to report bugs in the software.
If you have a question about how to use the software, use one of the other methods detailed…
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# Prerequisites
Please answer the following questions for yourself before submitting an issue.
- [x] I am running the latest code. Development is very rapid so there are no tagged versions as of…
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Hi,
I would like to know if this Library will work any kind of FPGA, or if there must be a Controll unit such as an ARM next to the FPGA?
Regards
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Previously the script used to work.But now it is not working and returning the following error by exitting the node.
u93923@s005-n007:~/prithvi/stream_yolo/stream_yolo/bin$ source $AOCL_BOARD_PACKAGE…
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Hello All,
I would like to run this code on a xilinx **ZCU102** board.
Can this run on **ZCU102**?
Thanks,
kapoor7997