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When I running simulation UVM based, vsim command crashed and tool is killed.
See below the log:
[2021-05-14 12:40:22 EDT] vlib work && vlog -writetoplevels questa.tops '-timescale' '1ns/1ns' +i…
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Vivado Simulator v2021.2
Copyright 1986-1999, 2001-2021 Xilinx, Inc. All Rights Reserved.
Running: /home/soc_qg/software/vitis2021.2/Vivado/2021.2/bin/unwrapped/lnx64.o/xelab --incr --relax --debug …
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```
When running ReSim examples, ModelSim can successfully compile the library and
the example source code but fail to load the design.
ModelSim only reports "Error loading the design" but does not…
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```
When running ReSim examples, ModelSim can successfully compile the library and
the example source code but fail to load the design.
ModelSim only reports "Error loading the design" but does not…
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Hi @luca-valente @micprog ,
I am trying to build the seizure detection application for pulpissimo on cv32e40p .
Though there were several issues, and things didn't work by just running the mak…
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```
When running ReSim examples, ModelSim can successfully compile the library and
the example source code but fail to load the design.
ModelSim only reports "Error loading the design" but does not…
-
## Observed Behavior
I am getting the following error when running the tests using the default configuration (OpenTitan).
```
# UVM_FATAL ibex/dv/uvm/core_ibex/common/ibex_cosim_agent/ibex_co…
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when I opened model_sample.slx, used embeded coder in simulink which used ert_linux.tlc, after clicking generate code, there is error as following. please let me know anything I missed.
Thanks/Fo…
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Seems like they have been failing for a while... as there seems to be a failure with CEP v4.0 as well (prior to chipyard bump)
So, for some reason they fail on Ubuntu w/Questasim, but not RHEL7 w/X…
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(1)Is this function only available using the questasim tool?
(2)I run the following command.
```
cd ara
make -C apps bin/hello_world vcd_dump=1
make -C hardware simc app=hello_word vcd_dump=1
…