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### Description
I've included the SRAM IP block from GF180 in a design (gf180mcu_fd_ip_sram__sram256x8m8wm1).
When running DRC on the hardened design it failed with 100x `V3.2a : min. via3 spacing …
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### Description
In `test_manifest_exists` in `docker/utils.py`, the url yields 410 gone http response.
### Environment
```
python3 ./env.py issue-survey
Kernel: Linux v5.18.15-arch1-1
Dist…
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### Description
I'm trying to run the instructions from [Setting up OpenLane](https://github.com/The-OpenROAD-Project/OpenLane#setting-up-openlane) and I'm getting an issue with mounting the `.Xautho…
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## Description
Trying to run:
```
export PDK_ROOT=/usr/local/share/pdk
export PDK=gf180mcuC
export STD_CELL_LIBRARY=gf180mcu_fd_sc_mcu7t5v0
export STD_CELL_LIBRARY_OPT=gf180mcu_fd_sc_mcu7t5v0
…
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Extracting SRAM using magic doesn't show `VDD` as a pin in spice, it only shows `VSS`. When doing LVS on `caravel_core` shows that the `VDD` and `VSS` are shorted, when removing SRAM wrapper it doesn'…
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### Description
Hello, with the same design, I happened to find that the old openlane version can pass the detail routing which will make the violations to 0, while the latest openlane cannot pass an…