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Somewhere in the process it might be helpful to suggest that agile process workpapers and artifacts should collate into an articulated document as a proxy for work-in-process (and potentially thereaft…
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# Abstract
"Transacting NEO on PassMeCash" is simply our project intention of developing NEO wallets on PassMeCash for PassMeCash users to access the Neo network and also use NEO for payments..
# Pr…
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Hello,
I'm trying the Murax soc on a Tang Nano 9k.
MuraxWithRamInit works with no issues. I'm able to run the demo, and to compile custom C software.
Now I want to try the XIP, to run code from a…
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# Document Purpose
The purpose of this document is to attempt to summarise the current status of work on Atlas, in a broad sense, for the benefit of all recent incoming and near term incoming team …
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Hello, thank you very much sharing your valuable materials. I have some experience using Vivado HLS but I am still a slow learner for Hardware/FPGA design.
I am trying to run these Verilog files wi…
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## Feature Description
When annotating a text with resources for teaching, I would like to be able to add resources from the place in the front end where I want the resource to appear.
## *Why*…
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Here's a coherent project plan for Sayma v2. It is informed by extensive discussion on github Issue system over the past year and recent offline discussion with the Sayma v1 developers. This is posted…
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www.aqdi.com/wordpress/PCBChecklistLive.htm
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**[ UUID ]** 6f29b825-21f5-41a1-bb52-16cb654ef1a6
**[ Session Name ]** Feedback mobile games
**[ Primary Space ]** Digital Inclusion
**[ Secondary Space ]** Youth Zone
**[ Submitter's Name ]** Baran…
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I got involved in new project at the WUT.
We will build wideband MIMO SDR. Probably on the new RFSoC that:
- are pin compatible with ZU25
- offer 8x 10G DACs and 8x 5G ADCs
You won't find any i…